The professional's conference for embedded
computing technology, EPF gathers a sophisticated industry
audience from around the globe for four days of exciting conference
and seminar programs, including groundbreaking disclosures,
focused exclusively on microprocessors and related hardware
technologies driving the industry.
Microprocessors
101 8:30A-4:30P
Presented by: Tom
R. Halfhill, Senior Analyst, In-Stat/MDR
This is an exciting new introductory-level seminar for marketing
managers, public relations specialists, financial analysts,
venture capitalists, executives, mainstream journalists, and
others who need a plain-talk crash course in microprocessor
technology.
"Microprocessors 101" assumes no previous knowledge about
microprocessors. It will start with the absolute basics and
cover such topics as microprocessor architectures, pipelining,
superscalar execution, branch prediction, caches, chip fabrication,
performance factors, and how microprocessors work in system-level
designs. Private consultant and former MDR analyst Jim Turley
will make a special guest appearance to explain the basics
of semiconductor technology. This seminar is an ideal introduction
to our forums and other seminars. Register
Now
Processors
for Communication and Multimedia Applications
8:30A-4:30P
Presented by:
Jeff Bier, General Manager, Berkeley Design Technology, Inc.
(BDTI)
Today's communications and multimedia applications require
serious signal-processing horsepower. But speed alone isn't
enough: processors for these applications must also provide
rich development infrastructure and meet tight cost and power
constraints. Nowhere are these needs more evident then in
booming mobile multimedia markets like smart phones and portable
consumer media products. Which processors best meet the needs
of these and other communications and multimedia applications?
A perennial favorite at the Embedded Processor Forum, Jeff
Bier answers this question using the latest processor analyses
from BDTI, the highly regarded DSP technology analysis and
software development firm. Bier divides the crowd of processors
into manageable categories, and provides in-depth, objective
analysis of the most important architectures and products.
The seminar reveals what it takes for a processor to succeed
in today's demanding DSP-centric applications, and provides
unique insights into vendors' strategies and technology trends.
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Sponsored by: MIPS Technologies
Moderated by: Peter N. Glaskowsky, Editor in
Chief of Microprocessor Report In-Stat/MDR
and Maury Wright, Editor in Chief, EDN
This year EPF is expanding its technical
program to include a half-day session focused on the
product development challenges facing hardware design
engineers and engineering managers at system OEM houses.
Hosted by EDN magazine and In-Stat/MDR analysts, and
sponsored by MIPS Technologies, this event will bring
together senior engineers and executives from foundries
and IDMs tasked with solving the problems of chip manufacturing
beyond the 130nm design node and challenged with building
systems with these denser chips. Other critical issues
affecting time-to-market and lifetime cost-of-ownership
parameters in next-generation devices will also be addressed,
including presentations from leading developers of chip
design tools, SOC platform technology, embedded operating
systems, compilers and software development systems.
Speakers:
Keynote: Nikhil
Balram, CTO, Displays Group, National Semiconductor
Foundry Session:
Dr. John Martin, VP of Strategic Alliances, Chartered
Semiconductor
Paul Farrar, Jr., VP, Technology Alliances & Logic
Technology
Jackson Hu, President, New Business Development Group
and head of Design Support, UMC
Bill McClean, President, IC Insights
SoC Platform Session:
Joachim Kunkel, VP of Marketing, IP & Design Services
Sudhakar Sabada, VP of Design Technology Development
Tomas Evensen, Sr. Director Of Core OS & Tools Engineering
Kevin Morgan, Vice President of Engineering
Scott Horn, Director, Embedded & Appliance Platform
Group
Register
Now
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High-Performance
Embedded Processors: Trends and Techniques 8:30A-4:30P
Presented by:
Markus Levy, Senior Analyst, In-Stat/MDR
Embedded processors are a key component of all consumer, communications,
industrial, and office automation products. "High-Performance
Embedded Processors: Trends and Techniques" delivers the details
on the market and technology driving the use and the evolution
of high frequency and high performance embedded processors
in these applications. This day-long seminar begins with an
overview to bring you up to speed on the companies, processors,
and microarchitectures. From here, we'll dive into the particulars
that distinguish one processor architecture from another,
while providing our analysis and opinions to help you put
these details into perspective.
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Energy-Efficient
Processing 8:30A-4:30P
Presented by:
Max Baron, Principal Analyst, In-Stat/MDR
Cellular telephones, PDAs, and other consumer devices using
digital processing present opportunities for new products
that can reach annual volume sales in the hundreds of millions
of units. Computing systems-on-chip are increasing functionality
by employing multiple cores at frequencies of 400MHz and higher.
High performance, low energy consumption architectures are
evolving to reduce battery size, extend time between charges,
or simply to reduce wasted energy in mains-powered systems.
Low power processor and systems-on-chip technologies combine
circuit design, microarchitecture and software techniques;
their technical and business aspects are rapidly becoming
required education.
The seminar will present microarchitecture methods for reducing
power consumption in microprocessors and systems-on-chip,
comparing chips designed for minimal energy requirements,
and examining future trends in power-efficient engines for
mobile and fixed systems. Register
Now
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