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Microprocessor Forum 2000

Conference Day One

October 10


Monday Night Welcome Reception
sponsored by
ARM

Conference Day One - October 10

7:30 am Breakfast
and registration sponsored by

8:30 am
Keynote

Robert Morris - VP Personal Systems and Storage, Director Almaden Research Center, IBM

Pervasive Computing: What It Will Take

All revolutions, in computing or anywhere else, grow out of human experience. It was the new human experience that drove the transition from mainframe to departmental computing, from departmental to personal, from Internet to Web, and now from personal to pervasive computing. Pervasive computing has been variously described as ubiquitous, invisible and wonderful. It has also been described as noisy, intrusive and over-hyped. But we've tasted the concept and there's no going back.

What will it take to fulfill the promise and create an experience that delights billions of users? Those in the microprocessor or disk drive business know that a capability oversupply shock has long been predicted yet never sighted. Why? Because our meager attempts at getting a decent user experience have soaked up all the MIPS and gigabytes technology can muster.

Those in technology know that only advances by orders of magnitude really matter. Those in human-computer-interaction know that orders of magnitude -- and maybe more -- are needed to solve the interface problem. Dr. Morris will show that improvement by orders of magnitude are in store and will discuss atomic-level and quantum computing projects under way at IBM Research, work that has implications for both computing and storage. He will then discuss what kinds of user interfaces (and several other benefits to mankind) might result.

Click here to learn more about this interesting subject.

Session 1

9:20 am
PC Processors

Moderator - Steve Leibson, editor in chief of Microprocessor Report

We may be in the “post-PC” era by some pundits' reckoning, but 130 million or so PCs will ship this year. Consequently, it's hard to conclude that the life has gone out of such a large, vibrant market. This session brings the latest technological ideas and the newest microprocessors and core logic that will power next year's PCs and embedded PCs.

Intel Pentium 4 Processor: A Platform Perspective

Bill Siu - Vice President, Architecture Group, General Manager Desktop Platforms Group, Intel Corporation

The Intel Pentium 4 processor represents a revolutionary change to the PC platform. The Intel Pentium 4 processor-based platform delivers dramatic advancements in Intel's microprocessor microarchitecture and supporting platform components. This presentation will discuss the Intel Pentium 4 processor from a platform perspective.

Intel Pentium 4 Processor: A 1.4+ GHz Performance Processor on a 0.18-Micron Process

Michael Upton - Principal Engineer, Desktop Platforms Group, Intel Corporation

The Intel Pentium 4 processor represents a quantum leap in Intel's design of high-performance microprocessor microarchitecture for PC platforms. Fabricated on Intel's 0.18-micron process, this new microprocessor was designed for the evolving Internet. This presentation will provide insight into the microarchitectural advancements accomplished with the Intel Pentium 4 processor design.

Where's Centaur?

Glenn Henry - President, Centaur Technology, Inc.

After VIA acquired Centaur, the company has gone quiet. Now, they're ready to talk: about the three new processors appearing this year, about the new superscalar CX processor rolling out next year, and about VIA's overall processor strategy.

Motorola's GHz+ SOI G4 PowerPC Microprocessor

David Bearden - Senior Member of Technical Staff, Motorola

Motorola will disclose its latest incarnation of their G4 family of top-end PowerPC processors, injected with a whopping big dose of go-juice in the form of silicon-on-insulator (SOI) technology. This presentation will focus on the issues surrounding the migration of G4 class microprocessor designs to SOI as well as additional performance-enhancing architectural features.

10:45 am: Break

Getting Results: eCache on a PC Platform

Dean Klein - VP of Integrated Products, Micron Technology, Inc.

Formal introduction of Mamba, Micron's PC system chip incorporating embedded DRAM, an AMD Athlon interface, and many additional system-oriented features.

SoC with a 6th-Generation x86 Core

Luigi Mantellassi - Director, Silicon Systems Development, STMicroelectronics

This presentation will be the first public disclosure of STMicroelectronics' yet to be named PC-on-a-Chip featuring extremely low-power operation and high integration for information appliance applications.

Q&A Panel

12:20 pm: Lunch sponsored by

Session 2

1:30 pm
Workstation and Server Processors

Moderator - Kevin Krewell, Senior Analyst and Senior Editor Microprocessor Report, MicroDesign Resources

Processors for workstations and servers emphasize performance over price and just about anything else. This session reveals today's most advanced architectural and technological concepts applied to microprocessor design to achieve the speed demanded by these top-tier computers.

AMD's Athlon: Architectural Enhancements for Advanced Multiprocessing Systems

Steve Polzin -System Architect, AMD

This presentation discusses multiprocessing enhancements to the AMD Athlon processor's internal cache as well as the challenges and design tradeoffs required to make multiple hyper-GHz processors work in tandem.

21264E: An Alpha Microprocessor with Fast and Smart L2 Cache

Sung Bae Park - Principal Engineer, Samsung Electronics Co. Ltd.

First formal announcement of Samsung's latest iteration of the Alpha with details of the L2 microarchitecture.

S/390: A 64-bit Microprocessor

Eric Schwarz - Chief Engineer, IBM Corp.

Mainframes continue to evolve while maintaining binary compatibility with code written in the 1960s. This presentation discusses a microprocessor implementation of IBM's S/390 that adds 64-bit addressing to the architecture and doubles the cache with respect to its predecessor using 47 million transistors.

Power4: Core Microarchitecture

Charles Moore - Power4 Chief Engineer, IBM Corp.

At last year's Microprocessor Forum, IBM disclosed a technological tour-de-force called the Power4. This year, the company will disclose the core architecture and pipeline. In addition, the presentation will discuss how the Power4 overcomes memory-latency problems.

Q&A Panel

3:15 pm: Break sponsored byTexas Instruments DSP

Session 3

3:35 pm
Network Processors

Moderator - Linley Gwennap, founder and principal analyst of The Linley Group

Network processors also need far more performance than conventional microprocessors, but the parallel nature of the jobs they must perform drive the design of microprocessors in new and interesting directions. Many new network processors were introduced earlier this year at the Embedded Processor Forum and this session rolls out still more.

SB-1250: A High Performance, Power Efficient Chip Multiprocessor (CMP) Targeting Networking Applications

Jim Keller - Corporate Fellow and Chief Architect, SiByte, Inc.

This presentation provides the first technical details of SiByte's SB-1250, which combines two of the company's MIPS64-based SB-1 CPU cores with several high-performance, on-chip network interfaces and peripherals. Estimated Stream and SPEC benchmark data will also be revealed for the first time in this presentation.

XStream Logic's Optical Network Processor

Mario Nemirovsky - Founder, CTO, and Chief Architect, XStream Logic, Inc.

First architectural unveiling of a high-performance, high-bandwidth network processor core targeting OC-48 and OC-192 applications. This presentation will explain how this new architecture achieves orders of magnitude performance improvement over existing designs while presenting a simple, single-programming interface.

Acappella: A Platform for Multi-Channel Voice Processing

Lloyd Palum - Principle Staff Engineer, Improv Systems Inc.

Improv Systems rolled out a five-processor version of the JazzPSA platform at this year's Embedded Processor Forum. Now, Improv Systems is ready to reveal details of a two processor JazzPSA chip configured and optimized for the multichannel Voice-over-Packet (VoP) market.

New Developments in Intel's Internet Exchange Processor Family

Matthew Adiletta - Intel Fellow and Director, Communication Processor Architecture, Intel Corp.

Since first announcing the first member of the Internet Exchange Processor family (the IXP1200 Network Processor) last year, Intel has consistently added power and new functionality to the IXP family through new hardware and software offerings. This session will address the most recent enhancements to the IXP1200, new members of the IXP family and discuss some of the directions that future IXP products will take. It will also address key elements of Intel's Internet Exchange Architecture which provides a framework for the full suite of Intel's communications silicon products.

5:25 pm
The Thirteenth Annual Microprocessor Report Awards

Don't miss the one and only Nick Tredennick as he presents his annual roast of the microprocessor industry.

Associated Events

6:00 pm
MPF Expo 2000: Literature & Demo Center
Tuesday, October 10, 6:00 - 9:00 PM, Regency Room
Sponsored by
MIPS

Set aside the evening of Tuesday, October 10 to enjoy great food and drink, the company of your peers, and demonstrations by 40 leading microprocessor suppliers and vendors of related technologies.

Exhibitor List

Please Note: All times are subject to change.

Conference Day Two - -

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