| Sessions
Tuesday
October 5th
Keynote:
Driving System Performance-A New Paradigm
Dr. Bernard Meyerson, Chief Technologist
and Vice President, Systems and
Technology Group, IBM
Session One
PC,
Notebook, and Server Processors
Kevin Krewell, Editor in Chief, In-Stat/MDR
Still on the cutting edge of power and performance, the
processors in this session will provide a look into the
future of the multicore and multithreaded server processors,
and power- and cost-efficient notebook and desktop processors.
Each processor team has taken on a key industry design challenge:
pushing the limits of power efficiency, aggresively managing
die size, compressing the time-to-market for server processors,
and building complex systems on a chip. The one thing they
all have in common is that they have met the challenges
of building processors in 90nm process.
Multicore Processors Go Mainstream with
AMD64 Technology
presented by Kevin McGrath, Fellow, California Processor
Division, AMD
The Next Generation Centaur/VIA Architecture
presented by Glenn Henry, President, Centaur Technology
SPARC64 V/VI for Mission-Critical Servers
presented by Aiichiro Inoue, Director, Enterprise Server
Development Division, Fujitsu
Sun UltraSPARC IV+ Processor
presented by Dale Greenley, UltraSPARC IV+ Director of Engineering,
Sun Microsystems, Inc.
Transmeta's Second Generation Efficeon
Processor & Technology Roadmap
presented by David R. Ditzel, Co-founder and CTO, Transmeta
Corporation
Session Two
High-Performance Embedded
Processors
Tom R. Halfhill, Senior Analyst, In-Stat/MDR
This lively and highly competitive session has seven presentations
of new 32- and 64-bit processors for embedded systems, especially
in the fields of communications and networking. Some of
the the processors are highly integrated SoCs and include
multiple-core designs. Almost all of the companies in this
session are head-to-head competitors, so it will be interesting
to see how they came up with different solutions to the
same problems. The general trend is toward multicore processors
with fast on-chip interconnects.
Unveiling the PowerPC 440XX I/O Processor
presented by Alan Millard, Senior Solutions Architect, AMCC
The Next-Generation Line of Broadcom's
SiByte Multiprocessing SoCs
presented by Laurent Moll, SoC Architect, Broadcom Corporation
A Next-Generation Processor for Networking
presented by Richard E. Kessler, Principal Member of Technical
Staff, Cavium Networks
An Integrated Networking Application Processor
presented by C. J. Liang, Associate VP, R&D, Faraday
Technology Corporation
Freescale's First Dual-Core PowerPC Processor
presented by Toby Foster, System Architect, Freescale Semiconductor
PMC-Sierra's Third Generation Integrated
Processor
presented by Bryan Chin, Principal Engineer, Microprocessor
Products Division
Special Presentation
17th Annual Microprocessor
Report Awards
Nick Tredennick, Editor, Dynamic Silicon
Adjourn to Expo 2004
Wednesday
October 6th
Session Three
Innovative DSP Architectures
Max Baron, Principal Analyst,
In-Stat/MDR
Providing testimony to the exciting evolution of digital
signal processing engines, this session introduces eight
new products and architectural details of ISA enhancements,
configurable arrays, DSPs attaining high performance at
low power, and extreme performance massively parallel arrays--
all aimed at competing in the fast-moving DSP markets. InStat/MDR
will also present on a DSP tutorial-cum-seminar helping
interested attendees to obtain a complete picture of present
leading DSP offerings and future expectations.
Multimedia Technology for Application
Processors
presented by Simon Ford, Technical Lead, Multimedia Application
Processors, ARM
Signal-Processing on the MIPS Architecture
presented by Radhika Thekkath, Director of Architecture,
MIPS
SH-4 CPU with an AV/Graphics Subsystem
and High Speed Interconnects
presented by Mitsuhiro Miyazaki, Deputy Project Manager,
Renesas Technology Corporation
Virtex-4 FX Extends PowerPC Instructions
presented by Ahmad Ansari, Senior Staff Systems Architect,
Xilinx
A Hardware and Software Approach to Portable
Power Management
presented by Leon Adams, DSP Strategist, Texas Instruments
A Second Generation Vector DSP For Low
Power Streaming Applications
presented by John Redford, Chief Technology Officer, ChipWrights
Inc.
A 50-GFLOPS Processor for Scientific Computing
and DSP
presented by Simon McIntosh-Smith, Director of Architecture,
ClearSpeed Technology Ltd.
Redundancy & Binning in PicoChip's
Processor
presented by Will Robbins, Design Director, PicoChip Designs
Session Four
Cool Technology
Tom R. Halfhill, Senior Analyst,
In-Stat/MDR
Some presentations defy easy pigeonholing, so we have created
a new "Cool Technology" session to give them an
opportunity in the spotlight. The diverse topics include
advanced design automation for configurable processors,
on-chip interconnects, and massively parallel supercomputing.
Extension Automation for the ARC Processor
Family
presented by Lee Hewitt, Lead Designer, ARC International
PrimeCell AXI Configurable On-Chip Interconnect
presented by Tim Mace, PrimeCell Product Manager, ARM
The BlueGene/L Processor for Massively
Parallel Supercomputing
presented by Alan Gara, Chief Architect, IBM
Panel: Benchmarking x86
Processors for Embedded Market
Kevin Krewell, Editor in Chief, In-Stat/MDR
While the PC benchmarking wars have raged for years between
Intel and its main competitors AMD, VIA/Centaur/Cyrix, and
Transmeta, the market for embedded x86 processors has typically
not experienced the same controversy. That is, until AMD
recently introduced new benchmarks and a processor numbering
system that compared the company's x86-based Geode processors
with the x86 processors from VIA.We all know that processor
clock speed is a poor surrogate for platform performance.
But many questions still remain about how to judge performance
at the platform level. In what promises to be a lively discussion
panel, representatives of AMD, EEMBC, Synchromesh Computing,
Transmeta, and VIA are expected to debate these issues.
Audience participation will be encouraged.
Panelists
Dave Ditzel, CTO, Transmeta
Glenn Henry, President, Centaur Divison of VIA
Markus Levy, President, EEMBC
Eric Salo, Director of Marketing, AMD Personal Connnectivity
Solutions
Alan Weiss, CEO, Synchromesh Computing
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