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Patent Watch
Rich Belgard
The following U.S. patents related to microprocessors were issued recently.
Issued on January 29, 2008
HP—Data speculation across a procedure call using an advanced load address table.
Sonics—Logic system with configurable interface.
IBM—System and method of execution of register pointer instructions ahead of instruction issue.
QST Holdings—Hierarchical interconnect for configuring separate interconnects for each group of fixed and diverse computational elements.
Sun—Mechanism and method for cache snoop filtering.
Arm Limited—Delivering data processing requests to a suspended operating system.
Adaptec—Method and apparatus for data bit align.
Issued on January 22, 2008
Aerospace Corp.—Simultaneously multithreaded processing and single event failure detection method.
MIPS—Integrated mechanism for suspension and deallocation of computational threads of execution in a processor.
AMD—Store-to-load forwarding buffer using indexed lookup.
Intel—System and method for storing immediate data.
IP-First—Microprocessor apparatus and method for performing block cipher cryptographic functions.
Issued on January 15, 2008
SAS—Computer-implemented system and method for generating embedded code to add functionality to a user application.
Fujitsu—Branch predicting apparatus and branch predicting method.
Eleven Engineering—Multithread embedded processor with input/output capability.
Honeywell—Reconfigurable computing architecture for space applications.
Sun—Synchronization primitives for flexible scheduling of functional unit operations.
QST Holdings—Apparatus, method, system and executable module for configuration and operation of adaptive integrated circuitry having fixed, application specific computational elements.
Avocent—Split computer architecture to separate user and processor while retaining original user interface.
Adaptec—Method and apparatus for aligning operands for a processor.
Broadcom—Apparatus and method to receive and decode incoming data and to handle repeated simultaneous small fragments.
Issued on January 8, 2008
<none>—Fault tolerant computer.
MIPS—Random slip generator.
Cloudshield—Apparatus and method for interconnecting a processor to co-processors using shared memory.
ARM/U. of Michigan—Reuseable configuration data.
IBM—Asynchronous symmetric multiprocessing.
Via—Predicted parallel branch slicer and slicing method thereof.
IBM—Method and apparatus for improving performance margin in logic paths.
Tabula—Reconfigurable IC that has sections running at different reconfiguration rates.
Issued on January 1, 2008
Sun—Switching method in a multi-threaded processor.
Intel—System, method, and apparatus for spilling and filling rotating registers in software-pipelined loops.
NVIDIA—Method of providing a second clock while changing a first supplied clock frequency then supplying the changed first clock.
MIPS—Microprocessor instructions for efficient bit stream extractions.
AMD—Apparatus and method for port arbitration in a register file on the basis of functional unit issue slots.
Fujitsu—Re-configurable circuit and configuration switching method.
<none>—Data processing system having instruction specifiers for SIMD register operands and method thereof.
IP-First—Apparatus and method for selective memory attribute control.
Xilinx—Method and system for configuring an integrated circuit.
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