Vol 15, Issue 3

January 16, 2001

A GNU SPARC?

By Max Baron

It had to happen sooner or later. Significant 32-bit microprocessor freeware is here; it has arrived as an implementation of SPARC, and it's called LEON. The European Space Agency (ESA) has developed the 32-bit LEON, a SPARC V8–compatible core, for future space missions. SPARC in space! The core has been implemented as a highly configurable, synthesizable VHDL model, and the ESA has made the processor's full source code freely available under the GNU LGPL license. ESA hopes the GNU approach will help promote the SPARC standard and enable development of system-on-a-chip (SoC) devices using SPARC cores.

Why SPARC V8? Perceived as a laggard, SPARC has quietly, almost embarrassingly, seen use in a range of applications: printers, copiers, digital cameras, workstations, network processors, and airplanes. But dazzled by the shining light of new architectures, and disheartened by a few sunspots, most of its adopters have given it up. Sun Microelectronics is no longer visible. Sun's recent treks into computer architecture have strayed far from the simple SPARC V8—and in some instances far from SPARC itself. The embedded market has changed things: the value of an instruction set architecture (ISA) is measured nowadays in software tools and operating systems. SPARC V8 is valuable—it's a good architecture, it has plenty of solid software tools, and its binaries can run directly on Sun workstations—but nobody seems to want it anymore; thus it's a perfect candidate for freeware. Ergo, a SPARC compatible cleverly interfaced to the AMBA bus is born in freedom, compliant with the IEEE-P1754 (SPARC) standard and Sun's own SPARC V8 Architecture book.

Still marveling at SPARC's new-found life, let us consider the emergence of the free, open microprocessor as a genre and its impact on the future of intellectual property and semiconductor technology. Is the world ready to accept a free microprocessor? I think it is.

First, the cost of proprietary IP is daunting for startup companies. IP royalties might hinder sales of any product that is well into the commodity market window. Licensing fees and royalties have been made even more painful by the "consumerization" of the embedded market. Recently, cleanroom designs took a little bite out of this IP business as Lexra and PicoTURBO offered MIPS and ARM compatibles with lower license and royalty fees. The new introductions gained quick acceptance from companies that couldn't afford the larger investment but needed access to the prized architectures. Free cores promise to engage more companies, spark more projects, and yield less-expensive products.

Second, a soft core is welcome. With the emergence of competing foundries, soft cores are helping OEMs get the best deal and shortest time to market by moving from one foundry and/or process to another. Leading architectures are also now offered as soft cores. Configurable architectures can be offered only as soft cores.

Third, for many applications, frequency, performance, and even power dissipation need not be cutting edge; what many products need is an adequate processor that has decent development tools—an engine that's good enough to run the operating system to control and coordinate the other components. A system could be so intensive in DSP activities that the processor would take second seat anyway. From the software point of view, barring large percentages of assembly language, switching to a different core may have little impact if code can be easily cross-compiled and debugged on the new architecture. And cross-compilation isn't required for first instantiations of products.

There are, however, a few clouds in the sky, suggestive of the beginnings of GNU software tools. Technical support and continued development don't go well with "free"; the ESA, for example, has acknowledged its limitations by asking for volunteers that can help extend LEON's implementation and peripherals. Some very slim support may be available right now from the ESA, to encourage early adopters. The world is waiting for third-party support, like a "Cygnus Support" for free microprocessors.

In the meantime, system designers need to evaluate the risks and rewards of using a free engine. No up-front license fees—that's saving a very large sum of money—and no royalty—which translates to more profit; these benefits versus the need for more resources, more validation, and the greater development risk that can lengthen time to market.

The clouds have a silver lining, or the beginning of one: Metaflow, a company that has considerable microprocessor experience with several architectures, including SPARC, has offered its design services to create complete SoCs with LEON cores. Other design groups will undoubtedly follow Metaflow's example if the demand is high enough. And maybe an additional piece of encouraging data: LEON fits in one each of Altera's or Xilinx's programmable logic device (PLD) chips. Other architectures' simple cores will also fit.

For the sake of completeness, Nios, a soft proprietary architecture core offered by Altera on PLD, is license free but will require royalty fees. Traditional business conditions are expected of PowerPC, Xtensa, ARC, MIPS, and ARM, which have also made the PLD scene.

Roadmap-wise, introduction of additional GNU LGPL engines is unlikely to come from groups that won't survive without license and royalty revenues. Most probably, new free cores will come from large organizations or academic bodies that are either well funded or have the advantage of time and do not compete in the market. Architectural extensibility can keep these cores useful for a long time. ISA extensibility has come to be accepted in the industry through the example set by big companies like Intel, AMD, HP, and Sun; by leading IP providers ARM and MIPS; and by ARC and Tensilica, which are offering designer-configurable cores.

Support and development roadmap notwithstanding, a synthesizable free microprocessor is a timely challenge for the expert. It is modifiable and extensible, and in the hands of capable engineers, it can be developed, extended, and debugged beyond the proprietary walls normally erected around classical architectures.

It's not very likely that these new free engines will replace the cores that require license and royalty payments. Extreme results in design must still be hand-tuned, whether for performance, power dissipation, or wide and multiple datapaths and deep pipelines. But a sizable number of volume applications don't need the extremes, and that situation will establish the free cores.