Embedded Processor Watch

Editor: Jim Turley

In This Issue:

• QED RM52xx MIPS Chips Get Bigger Caches, Faster Clocks
• Motorola Vows to Rationalize Design Process
• First Embedded Processor Forum Debuts 10 New Chips
• Industry Resources: Engineering, Management Training
• Industry Resources: Five Years of Online Games

QED RM52xx MIPS Chips Get Bigger Caches, Faster Clocks

Coincident with its announcement of the RM7000 (see Embedded Processor Watch #5), QED has updated its RM5230, '60, and '70 chips. All three have undergone a process shrink that allowed QED to raise the maximum clock speed and double cache capacity.

As part of a process shrink from 0.35 to 0.25 microns, QED took the opportunity to double the size of the chips' caches to 32K each, while keeping the die size the same, at about 45 mm2. The redesigned chips now run faster than their predecessors, with top clock speeds reaching 266 MHz. The 0.35-micron chips will remain in production; the new parts are dubbed RM5231, '61, and '71 to distinguish them from their previous incarnations.

The new RM52x1 chips are priced from $26 to $94 in 10,000-unit quantities. Where the old and new parts are available at the same clock rate, the upgraded version is usually only about $8 more expensive. Whereas the RM52x0 parts peak at 200 MHz, the new chips now offer 250- and 266-MHz speed grades. For customers already using QED chips, these are simple, inexpensive upgrades. For new users, the RM52xx series is competitively priced and offers a selection of six related chips based on the same CPU.

Motorola Vows to Rationalize Design Process

As either cause or effect of its latest reorganization, Motorola has concluded that it will use a compatible set of design tools within the company for future microprocessor development. Each of the company's various divisions had heretofore used separate--and mutually incompatible--design tools, complicating design reuse within the company. A serial peripheral designed for, say, a ColdFire processor could not easily be used with a PowerPC part, or vice versa.

In the future, Motorola will use tools that are compatible with the popular Synopsys, Cadence, and Mentor tool chains. This new level of compatibility should make it easier for various Motorola design teams to share circuit designs (intellectual property in the current parlance), and to integrate designs that customers bring with them.

None of this rationalization has actually taken place, and Motorola says the process will likely take "several years" to complete. In the meantime, some microprocessor core designs and peripheral functions (of which Motorola has many) will be converted to the new design methodology. The change should be mostly invisible to Motorola's customers. When the transformation is complete, Motorola anticipates some shortening in development cycles. Until that time, things are likely to be even more complicated as the company gets up to speed on all the new tools.

First Embedded Processor Forum Debuts 10 New Chips

Embedded aficionados will be marking their calendars for Thursday, October 15, when ten new microprocessors will debut at the first annual Embedded Processor Forum. The conference is a new part of the annual Microprocessor Forum held every October in San Jose. The two-day conference revolves around the world-premier announcements of several new embedded CPUs, including the first details of ARM10, ColdFire version 4, two new MIPS designs, IBM's latest embedded CPU, Hitachi's SH3-DSP, and a secret new chip from Triscend.

The conference program will highlight three trends in the embedded industry: the rise of ASIC cores, the growing importance of mixed CPUs/DSPs, and the increasing level of peripheral integration in standalone microprocessors. Five panel discussions will explore these topics in more detail, along with a look at progress in embedded benchmarking.

The conference is organized by MicroDesign Resources; the host will be your Embedded Processor Watch editor, Jim Turley. For more information, visit http://www.MDRonline.com/forum.

Industry Resources: Engineering, Management Training

System Technology Institute will be taking seven technical courses on the road starting this month. The 3-4-day courses cover software engineering, QA, configuration management, project planning, testing, and risk analysis.

For information and a course schedule, call STI (Malibu, Calif.) at 888.299.9071 or mailto:STIclass@aol.com.

Industry Resources: Five Years of Online Games

That's the promise of Jupiter Communications' study of Internet gaming. Technology, marketing, software, and consoles are covered in the $1,895 report. For more information, contact Jupiter (New York) at 212.780.6060, extension 103.