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Embedded Processor Watch



MicroDesign Resources --- August 31, 1998 #11

Editor: Jim Turley

In This Issue:

  • Motorola MMC2080 Drives 32-Bit Pagers
  • Hitachi Makes SuperH Flash Splash
  • VLSI Has Palm DSP Core in Hand
  • ARM7TDMI-S Clarification
  • New Embedded IC Announcements

Motorola MMC2080 Drives 32-Bit

"Making life miserable for the masses" could be Motorola's new company motto. The company that brought wireless communication to America's police force and belt-worn pagers to everyone else has built a reputation on mass-market wireless and networked communication. The company's latest microprocessor, the MMC2080, reinforces that reputation by introducing 32-bit processing into pagers.

The MMC2080 is only the fourth MCore processor, after the debut MMC2001 (see Microprocessor Report 3/30/98, p. 13) and the DSP-equipped 56651 and '652 twins (see Microprocessor Report 4/20/98, p. 9). The bulk, if not the heart, of the MMC2080 is its Flex paging protocol handler. Flex is a Motorola-designed protocol that has become nearly universal, handling high-end features such as roaming, delivery confirmation, broadcasting, and other relatively advanced paging concepts.

The processor runs at just 10 MHz, executing code directly from its 96K of on-chip ROM and using 6K of RAM as scratch space. A simple paging system might consist of the MMC2080, an RF front end, a 76-kHz crystal, and a user interface. Surprisingly, the chip does not include an LCD controller. Motorola defends this decision, saying its customers prefer to select their own LCD controllers, and that no single design would satisfy all customers.

The chip, which goes into production in March, will sell for $9.60 in 25,000-unit quantities. There seems little question that Motorola will use the chip in its own line of high-end text pagers; that alone should guarantee the MMC2080's success. Pagers have not disappeared with the advent of inexpensive cellular telephones, they've just metamorphosed into something more functional, complex, and intrusive. In the communications rat race, Motorola is gaining ground.

Hitachi Makes SuperH Flash Splash

Hitachi announced today a plethora of 8-bit, 16-bit, and 32-bit microprocessors and microcontrollers with on-chip flash memory. The bulk announcement is part of a strategic move by Hitachi to differentiate its chips from a crowded field by showcasing the company's flash technology. In the 32-bit arena, Hitachi rolled out four new variations of its SuperH line, all of them upgrades of existing SuperH parts.

The new chips are the SH7017F, SH7055F, SH7410F, and SH7065F. The "F" suffix, not surprisingly, indicates the presence of flash memory. The 7017F is a pin-compatible replacement for the existing SH7040, '42, and '44 parts, but with 128K of flash memory. The SH7055F is a much higher- end device that competes with Motorola's PowerPC-based MPC555 for automotive engine-control applications. The SH7055F has a whopping 512K of flash memory, setting the current record for a 32-bit chip. The SH7410F is a drop-in replacement for the normally mask-programmed SH7410 (aka SH-DSP). Finally, the SH7065F is in industrial controller similar to the SH7040 series but with 256K of flash memory.

Hitachi intends to replace OTP (one-time programmable) ROM with flash memory throughout its entire line of microcontrollers and microprocessors within a few years, as process geometries fall below 0.5 microns. This is a bit sooner than most of its competitors will make the switch, a fact Hitachi hopes to turn to its advantage. All four devices will begin sampling in 4Q98, with production scheduled for mid-1999. At this rate, many embedded designers may soon get their first taste of high-density flash memory in 32-bit chips.

VLSI Has Palm DSP Core in Hand

DSP licensing company DSP Group has teamed with VLSI Technology in announcing the latest digital-signal-processor design for ASIC developers. The new PalmCoreDSP, as it is called, promises a quantum leap in performance over the company's current top of the line, Teak. VLSI is the first announced licensee of Palm, but not the last.

Palm will initially be fabricated in VLSI's 0.25-micron, 1.8-V CMOS process, with a target frequency of 150 MHz. Both companies claim 450 MIPS of DSP performance at 150 MHz, on the assumption that Palm can perform three "Oak-equivalent" operations per cycle, making Palm 3x faster than Oak at the same clock speed.

As a synthesizable DSP core, Palm can be configured three ways, with either a 16-bit, a 20-bit, or a 24-bit data path, depending on the designer's requirements. The performance of the DSP is unaltered by word size, although its silicon area grows by about 25% for each increment in width.

With its fundamentally different internal architecture, Palm is not binary compatible with any previous designs from DSP Group. Palm is software-compatible at the source-code level, but existing binary code for Pine, Oak, or Teak DSPs will not run.

The addition of Palm gives VLSI (and, presumably, DSP Group's other licensees) a new high end to its DSP-based ASIC products. When VLSI actually starts building Palm-based chips in mid-1999, it will be better positioned to compete with high-end DSP chips from TI, Lucent, Analog Devices, and Motorola. VLSI is also a long-time licensee of the ARM architecture; the combination of ARM and Palm could lead to some truly horrific product names in the future.

ARM7TDMI-S Clarification

Speaking of ARM, issue #9 of Embedded Processor Watch contained some ambiguous language regarding the size and speed tradeoffs for the ARM7TDMI-S core. According to ARM, if designers choose to optimize the aforementioned core for speed, they can expect up to 90% of the performance of a hand- tuned ARM7TDMI, but at a 2-3x penalty in silicon area. Conversely, if the core is optimized for area, it can be made only 50% larger than a hand-packed ARM7TDMI, but run at half the speed.

New Embedded IC Announcements

EPM7256A (Altera) Device has 256 macrocells, 3.3-V supply, and pin-to- pin speeds as fast as 7.5 ns; with 164 I/O pins in 208-lead PQFP package. Price: $15.50/25,000; Samples: Now; Production: 4Q98; Call Altera at 408.544.7000.

EPF10K10A (Altera) Medium-density FLEX device has 10,000 gates, 3.3-V supply, 6,144 bits on-chip RAM, and 576 logic elements; in TQFP-100 package. Price: $6.50/100,000; Production: Now; Call Altera at 408.544.7000.

Ultra37032 (Cypress) Programmable device has 32 macrocells with fixed delay of 5 ns pin-to-pin; family allows pin- and speed-locking for logic changes in same pinout. Price: $1.25/50,000; Production: Now; Call Cypress at 408.943.2600.

Ultra37512 (Cypress) Programmable device has 512 macrocells with fixed delay of 7.5 ns pin-to-pin; compatible with remainder of Ultra37000 family. Price: $49/50,000; Production: Now; Call Cypress at 408.943.2600.

ZPSD-711S5-15J (WSI) Microprocessor support ship includes EPROM, supervisory functions, programmable logic, and consumes 0.8 mA per MHz. Price: $5.87/10,000; Production: Now; Call WSI at 415.656.5400.


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