Embedded Processor Watch

Editor: Cary D. Snyder

Contributors to this issue: Steve Leibson, Cary Snyder and Mark Long

MDR's Steve Leibson is part of a Special Television Report on the state of the semiconductor industry on Silicon Valley Business Report broadcast on San Jose, California's Channel 36 TV Station. If you are in the Silicon Valley you can see Steve by watching the Silicon Valley Business Report this Saturday night at 10:30pm or the second showing on Sunday at 10:00pm on 36 KICU-TV.

In This Issue:

• StarCore SC140 Gets Baby Brother
• FPGA Processor Cores Get Serious
• Embedded Tidbits
• Silicon Valley Coverage of Microprocessor Forum 2000 Oct 9-13

StarCore SC140 Gets Baby Brother Half the Core Size, Half the Power, Less Computational Ability

By Steve Leibson {Posted 9/18/00-02}

StarCore, the Motorola-Lucent DSP-core alliance, has produced its second core design. The new SC110 is the baby brother of the previously announced SC140 and bears a strong family resemblance. The major difference between the SC110 and the SC140 is that the SC110 has in its data ALU only one-fourth the number of computational units in the SC140. StarCore created the SC110 variant because the SC140 is too powerful, too large, and too power hungry for many DSP applications, such as handheld 3G voice-only terminals. The SC110's data buses and dispatch-issue width are also half the size of the SC140's. Because of the narrower data buses, the SC140's quad 16-bit move instructions, dual 32-bit move instructions, and quad 16-bit Viterbi move instructions are not present in the SC110 instruction set; these instructions require the wider 64-bit bus width. What remains after all the chopping and hacking is a DSP core that's upwardly code compatible with the SC140, executes 1 MMAC/MHz, runs at half the operating power of the SC140 core, and requires half the silicon. StarCore plans to hand off the SC110 design to Lucent and Motorola in November. Once these client companies receive the SC110 core, they will begin to develop system chips. Only after these chips have been designed and fabricated will the SC110 be available in silicon. (The full version of this article is available online to Microprocessor Report subscribers at http://www.mpronline.com/mpr/h/2000/0918/143802.html).

FPGA Processor Cores Get Serious
FPGA Embedded Processors Set to Flood High-End Mainstream

By Cary D. Snyder {Posted 9/18/00-01}

Enthusiastic competitors in the field programmable gate array (FPGA) business and many others are leaping into the system-on-a-chip (SOC) market. Configurable or programmable processors are becoming a common theme and requirement for SOC development of all kinds. Altera, a longtime FPGA manufacturer, is speeding delivery on simple, fast, and easy-to-drive SOC utility vehicles by combining devices and system-development tools. Altera announced its overall embedded-processor strategy to include both a soft FPGA embedded-processor core product family called Nios and license agreements to use hard ARM and MIPS embedded-processor cores in future FPGA products. Altera may add a PowerPC core after successful negotiations with Motorola.

A Xilinx and IBM partnership announcement to license PowerPC processors and associated intellectual property (IP) reveals that Xilinx has an equally ambitious embedded-processor strategy for its next-generation FPGAs. All the attention that configurable cores are getting ensures that the FPGA embedded processor performance race is in high gear. FPGA vendors have wasted little time in realizing that combining proven embedded processor cores and programmable logic makes the most sense for a speedy utility vehicle of choice for successful SOC design. FPGA vendors are quite effective in focusing resources on volume opportunities for ARM, MIPS, and PowerPC over the more proprietary and potentially lower-volume processor or microcontroller cores from companies like ARC, Lexra, Tensilica, and Vautomation. Combining proven processors with easy and widely used FPGA technology creates FPGA embedded-processor hybrid chips that have advantages over chips developed using the traditional ASIC SOC chip-development path.

Altera's new Excalibur Development Kit includes a Nios processor and tool suite that demonstrate how easy and inexpensive SOC design can be. The kit provides the ability to design and create a fully custom embedded processor that can be up and running in hardware in a matter of hours without additional license or royalty fees. Combining powerful processor cores with FPGA logic enables the chips of the new millenniumÛchips that change in "Internet time." The breadth and depth of embedded-processor-related news demonstrates that the time for embedded-processor cores in FPGAs has arrived. (The full version of this article is available online to Microprocessor Report subscribers at http://www.mpronline.com/mpr/h/2000/0918/143801.html).

Embedded Tidbits

by Mark Long

Conexant, Connect One Intro Internet Appliance Reference Design

Conexant Systems and Connect One have announced a jointly developed reference design featuring Conexant's SmartSCM single-chip modem and Connect One's iChip Internet Controller. The two companies say this reference design will enable appliance designers to quickly and cost-effectively add Internet functionality to PDAs and other wireless Internet appliances. Announced earlier this year, Conexant's SmartSCM single-chip modem combines a modem controller, data pump, ROM, RAM, and Conexant's patented SmartDAA silicon data access arrangement (DAA). Conexant offers SmartSCM in versions that emulate V.32, V.34, or V.90 modems. Connect One's iChip is an Internet controller that mediates the connection between the host device processor and the Internet.

The iChip reportedly works in tandem with the SmartSCM modem controller and runs the Internet protocols for sending and receiving email messages and Web pages and also for opening and closing TCP and UDP sockets. The iChip includes 256K or 512K of on-chip flash memory for storing and updating the Internet protocols. According to Connect One, the company's high-level AT+i command set enables manufacturers without any Internet programming capability to Internet-enable their devices by writing just a few lines of code instructing their host processor to invoke Internet protocol commands on iChip. The joint reference design is available now. For more information: www.conexant.com.

MontaVista Previews Real-Time Linux 2.4

MontaVista Software has announced the immediate availability of a hard real-time Linux kernel based on current 2.4 software. MontaVista says this fully preemptable kernel provides a 30-fold improvement to the application responsiveness of the Linux kernel while fully preserving the Linux programming model. MontaVista is targeting a January 2001 release for a standard Hard Hat Linux product based on this technology. According to MontaVista, a fully preemptive kernel is essential for highly responsive real-time systems. The preemptable kernel improves real-time application response from hundreds of milliseconds (worst case) to about 12 milliseconds. MontaVista says it expects to achieve submillisecond (hundreds of microseconds) worst-case application responsiveness by the time the product is generally available next January. The prototype of MontaVista's preemptable Linux kernel is available immediately for IA-32 platforms at ftp://ftp.mvista.com. A technical paper, entitled "Design of a Fully Preemptable Linux Kernel," is available at ftp://ftp.mvista.com/pub/Real-Time/2.4.0-test6/preempt.txt.

Opersys, Lineo Intro Linux Trace Toolkit

Opersys and Lineo have announced the availability of the Linux Trace Toolkit (LTT) for real-time Linux. Although LTT has been available for standard Linux user-space tasks for many months, it has just recently been modified to provide the capability to trace real-time Linux tasks running in the kernel memory space. LTT provides developers with all the information necessary to reconstruct a system's behavior over a specified time period. Using LTT, designers can graphically view the precise dynamics of a system, identify which application has access to the hardware during a specific time slice, and see what actually happens to an application when it receives data. I/O latencies in a given application can also be identified, as well as the time when a specific application is actually reading from disk and the reasons for certain synchronization problems. A prepatched version of LTT, as well as other real-time Linux debug tools, will be available, starting in mid-September, on Lineo's Embedix RealTime CD, which is now undergoing beta testing. For more information: www.lineo.com.

Triscend, EPI Roll Out A7 Application Development Board

Triscend Corporation and Embedded Performance (EPI) have rolled out an application-development board for the A7 configurable SOC that will serve as a platform for software engineers who are prototyping A7-based embedded applications. Scheduled for release in 4Q00, the price for the A7 Application Development Board will range from $1,995 up, depending on the amount of on-board memory required. For more information: www.epitools.com.

Triscend, Wind River Announce A7 Debugging Tool Set

Wind River and Triscend have extended the firmware and software debugging functionality of Wind River's visionPROBE II and visionCLICK to provide Triscend's A7 customers with a tool set for configurable SOC-based embedded designs. Within visionCLICK's environment, logic designers reportedly can access and control the entire device, down to every signal in the embedded programmable logic. The Triscend A7 Development Kit will be available in 4Q00 at a price of $1,495. The kit will include the Triscend A7 Evaluation Board, the Triscend FastChip software, the visionPROBE II debug cable, and an evaluation version of visionCLICK. Additional visionPROBE II cables and full visionCLICK licenses can be purchased directly from Wind River. For more information: www.triscend.com.

Log Point Intros High-Speed Library Extensions

Log Point Technologies has announced new extensions to its line of software mathematical function libraries for execution on embedded microprocessors, plus related extensions to its line of mathematical function microcircuit designs. The new extensions reportedly include ultrahigh-speed lookup-table-based generators for scientific and engineering functions, such as reciprocal, square root, logarithmic, exponential, and trigonometric functions. The company claims these functions can speed mathematical computations by a factor of 20 to 50. According to Log Point, these new function-generator designs need no explicit multiplication operations, so they perform as well on the lowest-cost, highest-volume embedded systems possessing no hardware multiplier as they do on more expensive ones that have a hardware multiplier. The new function- generator designs will be described in an upcoming online lecture by Lester Pickett, to be published in the inaugural issue of the Online Symposium for Electronics Engineers (OSEE). For more information: http://www.techonline.com/osee.

Zilog Intros Embedded Webserver Software Suite

Zilog Inc. has announced an Embedded Webserver Software Suite that runs on the company's 8-bit Z180 microprocessors, including the recently introduced Z80S183. The Embedded Webserver Software Suite implements Internet protocol stacks that enable 8-bit microprocessors to access the Internet; it adheres to standards defined by groups such as the Internet Engineering Task Force (IETF) and the World Wide Web Consortium (W3C). The software stack features 15 Internet protocols: IPv4, TCP, UDP, ARP, RARP, IGMP, ICMP, PPP, SLIP, HTTP 1.1, DHCP, SMTP, TFTP, SNMP, and TELNET. An optimized software stack will also be available that implements key Internet protocols (IPv4, TCP, UDP, ARP, RARP, ICMP, PPP, HTTP 1.1, and DHCP) in a reduced memory footprint. Zilog's Embedded Webserver Software Suite will be available in October. For more information: www.zilog.com.

NETsilicon Acquires Embedded Network Technology From PSI

NETsilicon has acquired the strategic network technology assets of software developer PSI Softworks Technology, a subsidiary of PASW, Inc., in exchange for 90,000 shares of NETsilicon common stock. The newly acquired operation, which will remain in Newbury Park, California, will operate as the NETsilicon Softworks Group. Sales and ongoing development of FUSION products will continue to be managed from the Newbury Park location. NETsilicon has also announced a Web seminar that will be held on Thursday, September 21, 2000, at 2:00 p.m. EST. The topic is "Embedded Networking Fundamentals: Designing a Network Connected Device." Free registration for the "live" Internet seminar is now open. For more information: www.netsilicon.com.

Microsoft Announces Embedded System Briefings

Microsoft has announced that it will be inaugurating a series of worldwide briefings about embedded systems to be held in China, Germany, Great Britain, Japan, Taiwan, and the United States. Original equipment manufacturers (OEMs) are invited to attend the Microsoft Embedded Global Briefings to learn how the Microsoft Windows CE and Windows Embedded operating systems can be incorporated into 32-bit connected devices for Internet applications. The briefing sessions will include overviews of the Microsoft Windows CE 3.0 and Windows NT Embedded 4.0 systems; tutorials covering the writing of applications using Embedded Visual Tools; and discussions on the way OEMs can work with Microsoft to build Windows-powered embedded products. The dates and locations for the Microsoft Embedded Systems Global Briefings are as follows: Sept. 12, 2000, London; Sept. 14, 2000, Munich, Germany; Sept. 29, 2000, San Jose, California; Oct. 17, 2000, Tokyo; Oct. 20, 2000, Taipei, Taiwan; and Oct. 25, 2000, Shenzhen, China. For more information: www.microsoftembedded.com.

Microprocessor Forum 2000 October 9-13, 2000 San Jose Fairmont Hotel

"Significant embedded processor news and highly technical content..."

Microprocessor Forum 2000 Program Highlights:

Get breaking details on new chips and architectures from AMD, ARC Cores, ARM Ltd., Centaur Technology, Hewlett-Packard, Hitachi, IBM, Improv Systems, Intel, LSI Logic, Micron Technology, Motorola, picoTurbo, Samsung, SiByte, STMicroelectronics, Toshiba, Vulcan ASIC Ltd., Xstream Logic, and ZF Linux Devices

Now is the time to register -- For more information please visit our web site at http://www.mdronline.com/mpf Or call 1.800.527.0288