Embedded Processor Watch

Editor: Cary D. Snyder

Contributors to this issue: Cary D. Snyder, Kevin Krewell, and Peter N. Glaskowsky

In This Issue:

• Itanium Consumes Alpha
• Lexra Readies Networking Chip
• Synthesizable Core Makeover
• GeodeLink Puts Bandwidth Into IA
• Tidbits

Compaq and Intel have announced a multiyear technology and marketing agreement that will help both parties to be stronger competitors in the enterprise-server market. The immediate effect of the agreement is to accelerate the ramp of the Itanium processor family (IPF) within the high-end enterprise-server market; however, many distinct elements tied to the agreement will have a profound effect that extends well beyond Itanium.

Intel and Compaq are entering a long-term commitment involving a shared R & D project, and marketing agreements. One component of the agreement is the Parallel Technology Project, a joint engineering development focused on advanced parallelism for high-end computing. Intel’s and Compaq’s future cooperation with their Alpha and Itanium customers will ensure a successful roadmap for IPF.

Compaq will license its key Alpha enterprise technology to Intel, including microprocessor and compiler technology, and CAD tools. The most significant part of this technology transfer is Compaq’s firsthand expertise, in the form of engineering and support. Over the next 28 months, several hundred Compaq microprocessor engineers, compiler experts, and support staff will be offered employment with Intel-an attractive proposition, with current business conditions ideal for locked-in incentives. Retaining key personnel is a big issue for both companies.

Compaq’s decision was likely motivated by two factors: first, the desire to compete more effectively with Itanium-system vendors such as HP; and second, the need to share the huge financial burden involved in developing server components into larger and more-complex enterprise systems. Financial benefits will immediately accrue to Compaq and rapidly turn red ink into black.

By 2004, Alpha chip technology will be incorporated into a future evolution of the Itanium family that could include elements, mainly software related, of Compaq’s multithreaded 21464 (EV8) design (see MPR 12/6/99-01, "Compaq Chooses SMT for Alpha". The full version of this article is available online to Microprocessor Report subscribers at http://www.mdronline.com/mpr/h/19991206/131601.html).

Alpha Processor, Inc. (API Networks) does retain the right to develop future Alpha chips, but with Compaq’s priorities taking other directions, support for next-generation Alpha processors, such as the EV8 Alpha microprocessor, is likely to be limited in scope. With the licensing of Alpha technology, Intel will focus transfer talent and technology onto the Itanium processor family. Both Compaq and Intel are obtaining perpetual licenses to use Alpha-based technology.

As part of the agreement, Intel receives a nonexclusive license to Compaq’s Alpha chip and compiler technology. The Alpha compiler teams will immediately begin moving their code to support the Itanium processor family. Compaq will continue to support current Alpha customers by delivering the EV68 copper-interconnect version of the 21264 processor, followed by the 21364 (EV7) processor sometime in 2003.

Part of Compaq’s 64-bit enterprise-server consolidation to support the Itanium platform by 2004 is a commitment to deliver cost-effective server innovations based on standardized building blocks. Compaq will keep some of its key server-architecture expertise to itself, to give it a competitive advantage in the enterprise-server market.

Compaq retains control of the Tru64 Unix and Open VMS operating systems it has developed for Alpha, but it will offer IPF support to ISVs by the end of 2003-a good migration path for Compaq’s Alpha customers. Compaq will transition its MIPS-based NonStop Himalaya systems to IPF by 2004. Over time, the agreement removes two competing microprocessor architectures from the server market. Compaq has, however, assured its customers that it will continue to support them on Alpha-based systems for many years to come. This agreement will bring the most important technology from both companies to the Itanium platform. A big win for both Intel and Compaq.

Lexra Readies Networking Chip
New NetVortex PowerPlant Augments Lexra's IP Business
By Peter N. Glaskowsky {6/18/01-01}

Lexra is preparing to position itself as one of the few vendors in this market to offer the quick time to market of a standard network processor and the superior price/performance ratio possible with intellectual-property (IP) cores for ASIC integration. Lexra is developing the NetVortex PowerPlant (NVP), a ready-to-run network processor based on its NetVortex core assisted by substantial communications and I/O resources.

The NVP will contain 16 Lexra LX8380 cores, a separate LX4380 management-processor core, a PCI interface, and six independent memory controllers. These elements will be connected over four packet-transfer buses and a sophisticated crossbar switch. Combined, these buses and the crossbar switch provide some 396Mb/s of bandwidth for intrachip communication, enough to allow the NVP to support 10Gb/s networks.

Potential NVP customers--primarily vendors building Internet core and edge switches, according to Lexra--will have to wait a while for the new chip. The NVP design team is still in the floorplanning stage, with many months of challenging physical design work ahead. Lexra expects to see first silicon on the new chip by the end of 2001. Only then can Lexra's customers realize the benefits the NVP promises. (The full version of this article is available online to Microprocessor Report subscribers at http://www.mdronline.com/mpr/h/2001/0618/152501.html).

Synthesizable Core Makeover
Is Lexra’s Seven-Stage Pipelined Core the Speed King?
By Cary D. Snyder {7/2/01-03}

Lexra is ready to return to the RISC performance battle with a new, higher-speed synthesizable core that increases its clock speed by at least 50%. Lexra's newest MIPS-like synthesizable 32-bit core sports a new seven-stage pipeline and other not-so-obvious improvements. Apparently, Lexra is trying to do battle in the promising high-performance 32-bit MIPS processor market, pitting the LX4380 against the MIPS 4Kc, which will now include the recently announced 4Ke.

Lexra is banking on the LX4380's ease of implementation to attract a larger customer base. The company is appealing to smaller fabless semiconductor companies that are sensitive to time-to-market constraints, typically having small intellectual property (IP) design teams. It is common knowledge that boosting clock speeds in fully synthesizable cores requires a major design effort, owing to tight timing constraints caused by typical silicon optimization limitations. The design difficulty is the reason that CPU cores having clock speeds higher than 400MHz are not easily synthesized using just any ASIC library; they normally require high design optimization and accompany synthesis-layout files specific to the targeted silicon.

What is clear in designing SoC and the CPU microarchitecture is that the process must balance performance and ease of implementation--hallmarks of a good core. Under worst-case conditions (process and operating parameters) in a 0.18µm process, the worst-case clock frequency typically achieved in the LX4380 is 250MHz; it is 420MHz in a 0.13µm process. The 250MHz clock is 25% faster than the fastest synthesizable 32-bit RISC cores in the ARM9 and the MIPS 4K family, which run at 200MHz worst-case frequency in TSMC’s 18µm G process.

Lexra believes it is really onto something with its cache improvements, claiming its physically indexed cache is more desirable than similarly functioning virtual-address caches. This may be especially true with just a two-way set-associative instruction and data cache. There is, however, perhaps a better reason: by implementing the physically indexed cache, Lexra may have avoided infringing on several MIPS Technologies patents on virtually indexed cache. (The full version of this article is available online to Microprocessor Report subscribers at http://www.mdronline.com/mpr/h/2001/0702/152703.html).

GeodeLink Puts Bandwidth Into IA
National’s Latest Information Appliance Processor Stresses Bandwidth
By Kevin Krewell {6/26/01-01}

While the information appliance market has been retrenching, with vendors continuing to look for the right product formula, National has cooked up an improved version of its Geode processor. Details of the CPU core were not released, but at Embedded Processor Forum, National did reveal the new "glue" that will link together the various on-chip peripherals, the memory, and the processor. National's new approach uses a switched fabric, rather than a bus structure, to offer increased bandwidth and concurrency. The switched-fabric architecture will scale from 32-bit to 256-bit bus widths and will support up to 300MHz operation. National's GeodeLink provides very high internal bandwidth for concurrent media and data streams to best use the processing capabilities of the integrated peripherals. Built into GeodeLink is growth with support for up to 6GB/s of data bandwidth, allowing high-performance peer-to-peer communication.

The next-generation Geode processor, which uses the GeodeLink architecture, is expected to sample in 3Q01, with production in 1H02. Pricing has not been announced. (The full version of this article is available online to Microprocessor Report subscribers at http://www.mdronline.com/mpr/h/2001/0625/152601.html).

More information can be found at National’s Web site at http://ia.national.com/GeodeLink.

Tidbits
By Kevin Krewell {6/18/01-03}

RLX Ships Transmeta-Based Server

RLX Technologies has begun shipping an ultradense server design based on the low-power Crusoe processor. The RLX design uses processor "blades" that include a 633MHz Crusoe processor, 256MB of SDRAM, and a 10GB disk drive. Up to 24 ServerBlades can be assembled into a 3U-high System 324 rack-mounted chassis. In a six-foot-high rack, up to 336 ServerBlades can be assembled, giving RLX a numeric advantage in high-density Web- serving applications. RLX must be onto something with the low-power, high-density server, because it has signed IBM to a reseller agreement. The RLX agreement with IBM is a bi-directional deal in which IBM will sell the RLX System 324 to its Internet Data Center customers and will also supply components, including IBM disk drives, for the server.