Embedded Microprocessor Watch

Issue #157 -- 12/30/2002

Editor: Tom R. Halfhill  

In this issue:

Silicon Sandwiches to Go
Max Baron - Principal Analyst  {12/30/2002}

Intel has introduced two system-in-a-package chips, the PXA261 and PXA262. Both packages use an XScale core–based ASSP die and flash memory. The reduction in board area and the minute package may be the start of a trend that will deliver stacked components sandwiched into a single package. Intel’s new products are aimed at the smart cell-phone market, but they can be used in other portable communication and computing devices. PXA261 and PXA262 show significantly reduced power consumption compared with that of PXA250.

Microprocessor Report readers can access the full story here: www.mdronline.com/mpr/h/2002/1230/165201.html. To find out more about Microprocessor Report, please visit: www.mdronline.com.

Toward a Brighter Tomorrow
Peter Glaskowsky - Editor-in-Chief  {12/30/2002}

Most analysts now seem to agree that the semiconductor business will grow significantly in 2003—not up to the standards of the late 1990s but respectably enough after two years of red ink. In-Stat/MDR forecasts overall growth of 18.1%, with a 5.9% improvement in microcontroller revenue and a 17.3% boost to chips for computers.

There are encouraging signs of strength in key segments of our industry. Sales of PCs, video games, and other types of personal electronics were only slightly affected by the economic downturn and should increase substantially as the economy recovers. Semiconductor-industry executives are naturally conservative in tough times, but in recent briefings, I’ve detected signs of optimism. These good feelings are especially strong from execs who made the right bets before and during the downturn—investing in the right technologies at the right levels to line up with market demand in the post-bubble world.

What are the right technologies? Embedded microprocessors, especially those with exceptionally high performance or low power consumption, have a bright future. So do configurable logic devices, which help equipment manufacturers avoid the increasingly high costs associated with ASIC development. Even memory chips and hard drives, of all things, will play a growing role in our everyday lives as enabling factors in the transition to all-digital multimedia entertainment. These products stand to surpass their current status as lowly commodities—at least for a while.

The future isn’t entirely clear. Automobile sales, which grew while the economy shrank, may now be declining. High-definition television hasn’t caught on as quickly as many of us predicted, but DVD players have overcome a similarly slow start. PC sales will surely improve in 2003 as customers make upgrades deferred in 2002, but how many people will buy PCs for the first time? Are Western markets finally saturated?

We can’t afford to take the recovery for granted. The steps we took to survive the downturn were good, but, in my opinion, they weren’t enough. There will be more-difficult decisions regarding projects and people as we get a better idea of how our industry will look in the future. I believe we’ll see more demand for leading-edge fabs—including 300mm facilities—than has been predicted so far, and this shift in demand could abruptly deprive older fabs of the business they need to keep going.

Equally important is the need to find new markets and new applications for semiconductors. Worldwide economic productivity grows only a few percent a year. For chip sales to grow faster than that, chips must take a greater share of everyday expenditures. It’s easy to see how this happens in some areas. The superior quality of digital cinema, television, and music encourages us to spend more of our entertainment budget on chip technology, for example—but we can divert only so much of our income to entertainment.

I can’t say exactly how, but I believe semiconductors can, and must, earn their way into the other lines of our personal budgets. How can integrated circuits add value to our clothing, food, housing, and furniture? I don’t have the answers, but I’m sure some of you will help find them.

To find out more about Microprocessor Report, please visit: www.mdronline.com.

IBM Adds Strained Silicon to SOI
Tom R. Halfhill - Senior Editor  {12/30/2002}

IBM Microelectronics has successfully produced the first short-channel nMOS transistors using silicon germanium (SiGe) and strained silicon with a silicon-on-insulator (SOI) substrate. The test chips, which have thousands of operational transistors, pave the way for IBM to introduce a combination SOI/strained-silicon fabrication process with 65-nanometer (nm) lithography in 2005. The payoff will be higher clock frequencies or lower power consumption, depending on the chip designer’s priorities.

Scientists from IBM described their experiments in a paper at the IEEE’s International Electron Devices Meeting (IEDM) in San Francisco. Their research yielded two impressive conclusions: a single fabrication process suitable for mass production can successfully combine SOI, SiGe, and strained silicon; and the enhanced electron mobility of strained silicon is sustainable with transistors that have very short gate lengths.

Microprocessor Report readers can access the full story here: www.mdronline.com/mpr/h/2002/1230/165203.html. To find out more about Microprocessor Report, please visit: www.mdronline.com.

VLIW Pioneer Bob Rau Dies
Tom R. Halfhill - Senior Editor  {12/30/2002}

Dr. Bob Rau, Hewlett-Packard Fellow, pioneer of VLIW architectures, and recipient of numerous awards, died of cancer at his home in Los Altos, California, on December 10. He was 51.
Before joining HP in 1989, Rau cofounded Cydrome in 1984 and was chief architect of the Cydra-5 computer, one of the first VLIW systems. Rau and several engineers from Cydrome and its chief competitor Multiflow later went to HP and Intel, where they helped create the IA-64 EPIC architecture and Itanium processor. (See MPR 2/14/94-05, “VLIW: The Wave of the Future?”)

Rau’s most recent position at HP Labs was director of the Compiler and Architecture Research program, which developed the Elcor research compiler for EPIC. Since 1995, Rau had been working on HP Lab’s PICO (Program In, Chip Out) project. The goal of PICO is to automatically generate an optimized processor and compiler for embedded applications.

Rau recently received the Eckert-Mauchly Award from the Association for Computing Machinery (ACM) and the IEEE Computer Society and had been named an ACM Fellow. He was also an IEEE Fellow, a consulting professor at Stanford University, and an adjunct professor at the University of Illinois (Urbana-Champaign). He held 15 patents and two advanced degrees in electrical engineering from Stanford. Rau received his bachelor of technology degree from the Indian Institute of Technology in Madras, India.

To find out more about Microprocessor Report, please visit: www.mdronline.com.

Dhrystones Are All Wet
Alan R. Weiss  {12/16/2002}

Created in 1984, Dhrystone was intended to help benchmark computer systems. Its weaknesses and inherent characteristics, however, have rendered it useless for comparing modern microprocessors, let alone entire computer systems. We show this by highlighting two processors, one from ARM, Ltd., and one from MIPS Technologies, and find out the truth: you can’t compare apples to apples using stones.

Microprocessor Report readers can access the full story here: www.mdronline.com/mpr/h/2002/1216/165001.html. To find out more about Microprocessor Report, please visit: www.mdronline.com.

IBM and Chartered Join Forces With Fabs
Tom R. Halfhill - Senior Editor  {12/16/2002}

Fabrication technology and fabs are getting so expensive than even the biggest companies are forming alliances to share the burden. The latest linkup is between IBM, a leading innovator in chip technology, and Chartered Semiconductor Manufacturing, the world’s third-largest independent chip foundry. Their open-ended multiyear agreement includes joint technology development and shared fab capacity.

Although IBM originally said the agreement involves “leading-edge technology,” the company later clarified that it won’t share its most advanced (and expensive) fabrication techniques, which use silicon-on-insulator (SOI) transistors, strained silicon, and silicon germanium. Instead, the technology IBM shares under the agreement will be limited to bulk silicon. It’s still a good deal for Chartered, because IBM’s bulk-silicon technology is among the world’s best, and it’s what most foundry customers want. IBM expects bulk silicon to dominate the mainstream foundry market for the next few process generations before giving way to the more-exotic technologies appearing first in CPUs for servers, workstations, and PCs.

Initially, IBM and Chartered will develop mutually compatible bulk-silicon processes for 90-nanometer (nm) and 65nm production on 300mm wafers. Those processes will be based on IBM’s 9SF (90nm standard-foundry) and 10SF (65nm standard-foundry) processes, with variations for high performance, low power, and high density. Later, IBM and Chartered may exercise an option to extend the agreement to 45nm production.

By aligning their fabrication technology, IBM and Chartered will make it easier for ASIC and system-on-chip (SoC) customers to bring their chip designs to fabs operated by either company. The two companies are working with providers of electronic design automation (EDA) tools to ensure portability between the fabs and processes.

As insurance against capacity shortfalls and production glitches, IBM and Chartered also have a reciprocal manufacturing agreement. IBM could shift some chip manufacturing for its customers to Chartered’s new 300mm fab in Singapore, and Chartered could transfer some manufacturing for its customers to IBM’s new 300mm fab in East Fishkill, New York. Although fab capacity isn’t a burning issue during the current economic slump, the companies are planning for the market’s eventual recovery. Additionally, their reciprocal agreement shows why it’s vital to make their processes mutually compatible. Otherwise, if IBM or Chartered moved production to a different fab, customers would have to port their chip designs to different processes and ASIC libraries.

Although neither company revealed how much money Chartered is paying IBM for the technology-sharing part of the agreement, the deal will have some immediate benefits for Chartered, in addition to the obvious economies of shared development costs and fab capacity. The Singapore-based company is pushing back pilot production of 300mm wafers at its new Fab 7 in Singapore, from 3Q03 until late 3Q04. The one-year respite allows Chartered to save money during the current market slump and spend more time refining its 300mm and 90nm technologies. IBM plans to begin producing 90nm-scale chips on 300mm wafers at East Fishkill in 3Q03, so, under the reciprocal manufacturing agreement, Chartered can still offer those services to its customers in a timely fashion.

To smooth the transition to 65nm, IBM and Chartered will codevelop that technology at East Fishkill and implement it at their respective fabs in 2005. The companies plan to announce more details about their 65nm project in 4Q03.

To find out more about Microprocessor Report, please visit: www.mdronline.com.

Tensilica Patents Raise Eyebrows
Tom R. Halfhill - Senior Editor  {12/09/2002}

Tensilica has been granted two U.S. patents for its system of automatically generating a custom microprocessor core and compatible software-development tools, and the company has 16 more patent applications pending. If archcompetitor ARC International is granted U.S. patents for dozens of similar
applications now pending—in addition to the international patents it already holds—the result could be a legal minefield for any other companies that try to offer configurable-processor technology.

The new Tensilica patents are numbers 6,477,683 (filed February 5, 1999) and 6,477,697 (filed May 28, 1999), both issued November 5, 2002. They describe Tensilica’s Xtensa microprocessor core and related tools, which were first announced the same year that the patents were filed. (See MPR 3/8/99-03, “Tensilica CPU Bends to Designers’ Will.”) Xtensa is a synthesizable embedded-processor core with an extendable architecture: system-on-chip (SoC) developers can add new instructions, registers, and other features to the base architecture to customize it for specific applications. Because the architecture is so flexible, the software-development tools must also be customizable, enabling the compiler, assembler, debugger, and simulators to recognize and use the extensions.

Tensilica has one previous patent (number 6,282,633), issued in August 2001, but it’s a fairly narrow patent on the Xtensa architecture. The new patents make more sweeping claims.
Despite this, Tensilica says it wrote the claims not to protect any configurable-microprocessor system but to protect its own system, which the company believes is unique. In particular, Tensilica’s system depends on a proprietary instruction-description language, TIE (Tensilica Instruction Extensions). That language sets it apart from similar technology from ARC International, which currently uses industry-standard VHDL or Verilog for custom extensions.

Largely because of that difference, Tensilica says it has no plans to assert its patents offensively against ARC. However, potential new competitors should worry. Between Tensilica’s patents and at least 39 pending patent applications by ARC, there may be little room for anyone else to offer a similar configurable-microprocessor system. Soft-core providers, such as ARM and MIPS Technologies, that are edging toward greater configurability may find themselves locked out altogether. For now, Tensilica is holding its patents in reserve for defense, in case anyone copies the company’s specific technology.

Microprocessor Report readers can access the full story here: www.mdronline.com/mpr/h/2002/1209/164901.html. To find out more about Microprocessor Report, please visit: www.mdronline.com.

Analysts’ Choice Nominees Named
Peter Glaskowsky - Editor-in-Chief  {12/09/2002}

We are pleased to announce the following nominations for the 2002 Microprocessor Report Analysts’ Choice Awards. Our analyst team has been hard at work reviewing all the products introduced during the course of 2002, and we’ve even ferreted out a few microprocessors that have quietly become available in sample quantities.

We’ll have much more to say about all these chips in our year-in-review articles, which will appear immediately following the Analysts’ Choice Awards dinner early next year.

PC Processors
The PC market is currently dominated by Intel’s Pentium 4, but new processors from AMD, Transmeta, and even Intel itself, promise to challenge the Pentium 4 in 2003. For our PC processor award, we have selected one production processor and two chips that have recently begun sampling and are showing great potential.

AMD’s Athlon 64 (ClawHammer), now sampling, will offer 64-bit addressing, an on-chip memory controller, and HyperTransport. This chip will provide strong competition for the Pentium 4 and may be the first processor to bring 64-bit computing to the desktop.

Intel’s next-generation mobile processor, code-named Banias, a highly energy-efficient design, is sampling now to select OEM customers.

Intel’s Pentium 4, running at 3.06GHz with Hyper-Threading, is the fastest PC processor on the market.

Server Processors
We may remember 2002 as the year that Itanium 2 proved the true potential of the Itanium processor family. Although Intel and partner HP have made unprecedented investments in this unorthodox 64-bit architecture, competing RISC vendors continue to develop their product families. Despite all these efforts, the old x86 architecture, represented by Intel’s Xeon and AMD’s Opteron processors, is stronger than ever.

AMD’s Opteron, an x86-64 processor with on-chip memory controller and low-latency interprocessor links, will extend AMD’s reach into more-sophisticated server systems.

Fujitsu’s SPARC64 V has raised the bar for the SPARC architecture with an out-of-order integer core, a beefy floating-point unit, and the highest clock speed for any 64-bit server processor—1.35GHz.

HP’s Alpha EV-7, with its integrated RAMBUS memory controller and low-latency communication channels for multiprocessor meshes, is the last in this line, which started with Digital and was part of Compaq before Compaq’s merger with HP.

Intel’s Itanium 2 has performed well on benchmarks, including exceptional SPECfp2000 scores.

Intel’s Xeon MP, the 2.0GHz version with 2M of L3 cache and Hyper-Threading, powers some of the fastest midrange and high-end servers on the market.

High-Performance Embedded Processors
Our nominees for this category span a wide range of performance and features. Some of these nominees compete head-on for the same applications, whereas others have unique positions in the embedded marketplace. This year, we set the minimum performance bar at a clock speed of 400MHz. Performance, integration, innovation, and practical factors like price, power, and development-tool support will influence our selection of the best of these nominees.

Broadcom’s BCM1250 was a cowinner of last year’s award in this category and is still among the best. The chip includes features that make it an excellent choice for networking and communications equipment.

IBM’s 440GX is IBM’s highest-performance integrated processor and includes one of the best network-interface subsystems of any CPU on the market.

Intrinsity’s FastMIPS, which began sampling just in time to make the cut for this award, is the first embedded processor chip to reach the 2GHz mark. The chip has a 1M L2 cache, an on-chip DDR-400 SDRAM controller, and two 1GB/s RapidIO ports.

Motorola’s MPC7455, which shared the award last year, is still the fastest single-core embedded processor on the market, according to EEMBC benchmark scores.

NEC’s VR7701 features the superscalar out-of-order VR5500 core and includes on-chip cache and network interfaces at an excellent price.

PMC Sierra’s RM9000x2, the first dual-core processor to reach 1GHz, is sold primarily into the networking and communications markets but is among the fastest general-purpose embedded processors on the market.

Low-Power Embedded Processors
Recent advances in portable digital devices, such as cellular phones, PDAs, and portable media players, have given embedded-processor vendors new reasons to reduce the power consumption of their products. Most of this year’s nominees have dynamic power-consumption ratings of around 1mW per MHz, allowing tens of hours of MP3 audio playback from a single AA battery or equivalent, just to give one example of the many applications these chips support.

AMD’s 0.13-micron Au1100, originally developed by recent AMD acquisition Alchemy Semiconductor, runs at 400MHz at just 250mW, or 500MHz at 500mW.

Intel’s PXA250 consumes 500mW at 400MHz, owing to its 0.18-micron construction, but offers even more sophisticated power-management features. Like AMD’s chip, the PXA250 supports dynamic clock and voltage scaling.

NEC’s VR4131 is the lowest-power two-way superscalar processor, consuming just 275mW at 250 MHz.

Motorola’s DragonBall MX1 and NeoMagic’s MiMagic 5 offer the lowest power consumption of our nominees, 208mW and 200mW, respectively, for 200MHz operation. Both chips also offer hardware-assisted multimedia processing for greater efficiency.

Extreme Processors
The potential for rapid growth in performance-hungry applications, such as digital broadband communications and multimedia encoding, has renewed designers’ interest in highly parallel processor architectures. The resulting products have brought forth new challenges in software development tools. We have selected the following nominees for this award.

Carnegie Mellon University’s PipeRench has completed the first step in its transition from academia to the commercial world with a chip fabbed by STMicroelectronics that features 256 processing elements.

Intrinsity's FastMath couples a 2GHz MIPS core with a 16-element math engine.

Micron's Yukon takes advantage of the company’s expertise in memory technology and connects its massive parallel engine to an equally massive block of on-chip memory.

NEC’s DRP employs 512 on-chip processors to deliver the best performance among our nominees for communications applications.
PACT’s XPP is designed to support multiple parallel threads among its 128 on-chip processing elements.

Sandbridge’s SandBlaster consumes the least power for its level of performance among these nominees and comes with software-development tools that use semantic analysis to uncover parallelism in C-language code.

Embedded IP Processor Cores
ASIC and SoC developers have different requirements, but all need microprocessor cores that are powerful enough to run the application, consume little power (especially for mobile products), occupy a small amount of die area (to hold down silicon costs), and are easy to work with. Those requirements have spawned a wide variety of licensable CPU cores, including some that are extensively customizable. The nominees in this category are the most versatile and innovative cores released in 2002.

ARC International’s ARCtangent-A5 has an enhanced 32-bit customizable processor core that supports both 16- and 32-bit instructions.

ARM’s ARM1026EJ-S is the first ARM10 soft core and is also the first core from ARM especially designed to be synthesizable.

ARM’s ARM1136JF-S is the first ARM11 core, soft or hard, and embodies significant improvements over previous ARM cores, such as integrated DMA, static and dynamic branch prediction, and a high clock-frequency target for a soft core (400MHz worst-case in a 0.13-micron process).

The Crescendo core from Improv Systems is the company’s second-generation VLIW media processor, building on the technology first introduced with Improv’s Jazz Programmable System Architecture.

MIPS’s M4K is the company’s newest 32-bit MIPS core, offering several enhancements that include improved bit manipulation, reduced interrupt latency, and support for multiple hardware threads.

Tensilica’s Xtensa V is the fifth version of Tensilica's customizable soft microprocessor core in just three years, providing support for multiprocessor SoCs, a better Tensilica Instruction Extension (TIE) language, and a more-optimized C/C++ compiler.

Graphics Chips
Following our focus on game-console chip sets last year, we’ve again decided to look at PC graphics chips for 2002. A new wave of fully programmable graphics processors (GPU) is expanding the boundaries of performance and flexibility for 3D-software developers and redefining the relationship between graphics chips and the rest of the PC. Here are our nominees.

The 3Dlabs Wildcat VP900 was the first of these groundbreaking chips to be introduced.

ATI’s Radeon 9700 is the best-selling fully programmable graphics chip on the market and is still the fastest in some crucial respects.

Nvidia’s GeForce FX, which was announced in November, arrived later than most expected but sets new records for performance, complexity, and cost.

Network Processors
Despite the collapse of the dot-com boom and the resulting drop in spending for network infrastructure, there are still many active network processor (NPU) developers. Some are large, established companies, and some are small startups. We’ve selected the following NPUs as the best chips offered during 2002.

AMCC’s nP7510 is a half-duplex 10Gb/s packet processor that is the latest in a large family of compatible products.

Cisco’s Toaster3 is a half-duplex 10Gb/s processor that Cisco has been using internally since mid-2001.

EZchip’s NP-1 is a full-duplex 10Gb/s NPU capable of application-layer processing.

IBM’s NP4GS3, was last year’s winner of this category; the company’s newer NP4GX will not sample in time for these awards.

Intel’s IXP2800 is a 10Gb/s half-duplex processor with sixteen 1.4GHz microengines.

Motorola’s C-5e is a significantly faster and more-capable version of a chip we nominated for last year’s NPU award.

Silicon Access Network’s iPP is a full-duplex 10Gb/s packet processor designed to work with the company’s suite of coprocessors.

Security Processors
Security processors have yet to find high-volume applications, but we strongly believe the Internet must be upgraded to provide better security, and these chips will be essential to that effort. The following security processors represent the best products in this market niche in 2002.

Broadcom’s BCM5841 succeeds the company’s BCM5840, a 2001 nominee, and is available in speed grades up to 4.8Gb/s.

Cavium’s Nitrox Plus 1540 is among the fastest security processors on the market, capable of encrypting 4Gb/s data flows.

Corrent’s CR7020 won this category last year, and, for 2002, we’ve nominated the company’s CR7120, an even more capable product that operates at 3Gb/s.

Hifn’s 8154 was nominated last year but has earned another nomination this year, due to its performance and capabilities. Hifn recently introduced several new chips, but these won’t sample until 2003.

The Microprocessor Report Technology Award
We like to give one award each year to an emerging technology that may or may not be commercially available, solely on the basis of its importance to our industry. Last year, we gave the nod to Intel’s implementation of Hyper-Threading technology, because we expect multithreading to emerge over the next several years as one of the most effective ways to make use of ever-increasing transistor budgets.

This year, we’ve decided to look further into the future and include a few technologies that may take years to appear in commercial products. Our nominees:

3D packaging, in which multiple chips are stacked and interconnected within a single package

Nanowires, the use of carbon nanotubes and possibly other engineered molecules to carry signals across chips

Strained silicon, which enhances electron mobility by modifying the crystalline structure of the silicon substrate

Value speculation, a microarchitectural feature that allows a processor pipeline to accelerate the execution of value-dependent instructions, using a predicted value as the basis.

To find out more about Microprocessor Report, please visit: www.mdronline.com.

China Unveils MIPS-like CPU
Tom R. Halfhill - Senior Editor  {12/02/2002}

A research group sponsored by the Chinese government has developed a MIPS-like microprocessor and has licensed the design to a Chinese startup company. The Beijing-based startup, BLX IC Design Corp., is currently sampling the chip and plans to begin production in 1Q03. It will be China’s first commercial 32-bit microprocessor.
Initially, the Godson-1 processor will run at 266MHz and is intended for embedded systems and thin clients. It was designed by the Institute of Computing Technology (ICT), a government research organization. According to David Shen, CEO of BLX, the chip is based on a new architecture with decoupled instruction decoders and is readily adaptable to different instruction sets.

Although the first press reports about the Godson-1 said it was x86-compatible, Shen told MPR the processor imitates the MIPS I, MIPS II, and MIPS III architectures, except for a few instructions patented by MIPS Technologies. He said a future version of the processor will be x86 compatible.

The patented instructions omitted from the Godson-1’s instruction set are the same ones named in a 1999 lawsuit MIPS brought against Lexra, which at the time was licensing MIPS-like synthesizable processor cores. (See MPR 12/06/99-03, “MIPS vs. Lexra: Definitely Not Aligned.”) MIPS and Lexra settled their dispute in late 2001. As a result, Lexra withdrew its soft cores from the market, became a MIPS licensee, and changed its business model to become a fabless semiconductor company.

The Godson-1 is sophisticated for a first attempt at a MIPS-like processor. It supports two-way superscalar execution, out-of-order execution, and register renaming. Five function units include two ALUs, two 64-bit FPUs, and an address-generation unit. The pipeline is seven stages long.
BLX is showing four reference designs based on the Godson-1: a thin-client desktop computer, a firewall adapter card, a small network router, and a storage-device controller. The thin-client design was inspired by the Chinese government’s desire to deploy large numbers of low-cost computers in schools.

Work is already under way on the Godson-2, which will support 64-bit memory addressing and is scheduled to reach first silicon in 1Q04. BLX has contracted with TSMC to manufacture both processors in a 0.18-micron CMOS process.

It’s not easy to design a microprocessor patterned after an existing architecture without attracting the unwelcome attention of patent attorneys. In addition to Lexra’s battle with MIPS, picoTurbo was successfully sued by ARM after reverse-engineering the ARM architecture (see MPR 11/13/00-04, “PicoTurbo Takes a Bite Out of ARM”), and Intel has sued almost every company that has cloned the x86.

As a mainland Chinese company that so far is doing no business in the U.S., BLX can probably avoid legal entanglements for a while. But if BLX begins exporting products or cloning other CPU architectures—especially the x86—the Godson processors may become an issue in future trade negotiations and international legal proceedings.

To find out more about Microprocessor Report, please visit: www.mdronline.com.

New IDT Processor Focuses on Bandwidth
Markus Levy - Senior Editor  {12/02/2002}

About three years ago, Integrated Device Technology (IDT) changed directions in its processor roadmap, going from vendor of standalone microprocessors to provider of integrated processors targeting the communications market. IDT’s latest processor in this foray is the Interprise RC32438 integrated communications processor.
Like other processors in the company’s Interprise family, the RC32438 includes a 32-bit version 2.2 PCI bus interface, a SPI interface, a DRAM memory controller, three general-purpose counter/timers, a 10-channel DMA controller, an I2C bus controller, two serial ports, an interrupt controller, and a general-purpose I/O controller. However, it differs from others in this family in its frequency jump from 150MHz to 266MHz and in the addition two 10/100 Ethernet ports.

The RC32438, powered by a MIPS32-compliant CPU core, will deliver moderate performance levels at 266MHz. Some processor bandwidth is freed up by the integrated Ethernet controllers, but the processor will still be responsible for handling all protocols and control software. The PCI bus controller on the RC32438 device performs data bursts and is designed to provide continuous bursting for sustained throughput up to 160MB/sec. The interface on the RC32438’s DDR memory controller operates at CPU pipeline speed.

The RC32438 ranges in price from $25 to $35, depending on frequency and temperature grade. For example, the 266MHz version in commercial grade will sell for $35 in 10,000-unit quantities. Availability of the RC32438 will be as early as 1Q03, depending on device.

Even at 266MHz, RC32438 performance will be sluggish. Compare this processor’s features with the recent announcement from Toshiba for its 64-bit TMPR4937 MIPS processor with integrated PCI bus, four channels of DMA, interrupt controller, and other features. The 300MHz TMPR4937 sells for $35 in 100-unit quantities, so its high-volume price will be significantly lower than that of the IDT device.

The IDT device competes head-on with IBM’s 266MHz 405GPr, which has many of the same peripherals, including 10/100 Ethernet ports. The 405GPr sells for $33. Power consumption also makes an interesting comparison—a 200MHz RC32438 and a 266MHz 405GPr consume 1.7W and 1.1W, respectively. (Power numbers are not yet available for the 266MHz RC32438.)

To find out more about Microprocessor Report, please visit: www.mdronline.com.