Embedded Microprocessor Watch

Issue #171 -- 02/23/2004

Editor: Tom R. Halfhill  

In this issue:

Intrinsity Licenses Fast14 to ATI
Peter Glaskowsky - Editor-in-Chief  {02/23/2004}

Intrinsity has licensed its Fast14 technology to ATI, the maker of PC graphics chips and related products. According to the press release, Fast 14 will be used “in future consumer products.” The announcement does not specify the sort of products Fast14 will be used in, but we believe it reasonable to suppose ATI will use the technology in developing the graphics core for Microsoft’s Xbox Next video-game console, now under development.

Fast14 has been proved in Intrinsity’s own FastMIPS and FastMath processors, which are now sampling at clock frequencies up to 2.5GHz. This speed is a remarkable achievement for a chip designed by a fairly small team and manufactured in a commodity 130nm process at TSMC.

The deal is not exclusive; Intrinsity is free to pursue similar relationships with other companies. We will be surprised if Intrinsity can’t sign up other partners. The advantages of Fast14 technology are substantial, and the cost of licensing this technology must surely be lower than the cost of competing against it.

Microprocessor Report readers can access the full story here (1 page): www.mdronline.com/mpr/h/2004/0223/180801.html. To find out more about Microprocessor Report, please visit: www.mdronline.com.

IA-32 Plus 64 Equals What?
Peter Glaskowsky - Editor-in-Chief  {02/23/2004}

After two years of speculation, the truth finally emerged last week—Intel has been working on 64-bit extensions for its x86 processors, and they’ll appear in new Xeon server processors by June. The extensions create what Intel calls the IA-32e operating mode, a name that somewhat understates the significance of the change—but IA-64 was already taken. There’s already a perfectly good name for the new instruction set, but Intel will never use it: AMD64.

The surprising truth is that Intel is already within a few months of releasing x86 processors that are software compatible with AMD’s Opteron and Athlon 64. Intel representatives have assured me that all the software Microsoft is now developing will run on both AMD and Intel platforms.

The 64-bit extensions are present in Prescott, the recently introduced 90nm Pentium 4, although they will not be enabled until the next stepping of this die is available. Nocona, a new 90nm die based on the Prescott core, but with an added L3 cache, also has 64-bit support. Both these chips have features not found in Opteron, such as Hyper-Threading and the SSE3 extensions. These features, plus the undeniable might of Intel’s marketing department, will put immediate pressure on AMD, probably forcing Opteron price cuts.

Intel may be playing catch-up with the AMD64 instruction set, but it has far better OEM relationships and platform designs that will need little work to take full advantage of 64-bit computing. I think it reasonable to assume that by the end of this year, Intel’s 64-bit x86 processors will be outselling AMD’s.

It’s an even safer bet that Xeon will outsell Itanium in 2004. This observation begs the 64-bit question: Can Intel afford to let Itanium compete with Xeon?

Today, Itanium has many features that Xeon lacks: more bus bandwidth, better floating-point support, and comprehensive internal error detection and correction circuitry. The last feature gives Itanium a tremendous advantage in reliability, availability, and serviceability (RAS), considered critical for enterprise server systems.

As long as Xeon continues to be developed as a derivative of Intel’s desktop processors, these server-specific features will not be added to it. AMD, lacking an equivalent of Itanium to protect, will have a greater incentive to differentiate its Opteron and Athlon 64 product lines. If AMD adds RAS features to Opteron, Intel’s Xeon group will have no choice but to respond, and Intel’s management will not object. Intel will not sacrifice its high-volume server processors to protect a low-volume line.

This scenario will take years to play itself out; in the meantime, Intel will maintain or even increase its pace of investment in Itanium. Just as Intel has waited until the last possible minute before admitting it has adopted AMD64, the company’s public commitment to Itanium will not waver until the day it decides to abandon the dual-architecture strategy.

That day may never come. Itanium is the fastest, most scalable server-processor family now on the market, the result of billions of development dollars. Xeon can’t possibly be ready to take over Itanium’s role in the server market before 2007. By that time, Intel will probably have sold over a million Itanium processors, making Itanium a solid commercial success in the market for high-end servers.

The ultimate fate of Itanium depends on a long series of decisions by Intel and other companies, including AMD, HP, IBM, and Sun. If Intel can keep Itanium sufficiently ahead of Opteron to prevent server OEMs and buyers from being tempted to view Opteron as an Itanium alternative, there will be no need to allow Xeon to encroach on Itanium’s turf, assuring Itanium’s long-term survival.

To find out more about Microprocessor Report, please visit: www.mdronline.com.

ARM Grabs Triscend
Tom R. Halfhill - Senior Editor  {02/17/2004}

No more is ARM the “chipless chip company.” ARM’s surprise acquisition of Triscend, a microcontroller vendor in Silicon Valley, will make ARM a fabless semiconductor company for the first time—at least in a small way.

ARM’s traditional business model is licensing intellectual property (IP), primarily hard and soft 32-bit microprocessor cores, for system-on-chip (SoC) and ASIC integration. Except for some chips sold with development systems, ARM prefers to let its customers design and sell their own chips based on ARM cores. ARM was a pioneer in licensing microprocessor IP and remains the most successful example. Although ARM will continue pursuing that business model, the U.K.–based company will now sell standard-part ICs in the merchant market as well.

However, ARM insists it does not intend to compete with its own customers that sell ARM-based chips. (And with 128 licensees, ARM seems to have almost everyone as a customer.) The slight departure from ARM’s traditional line of business is actually a strategic move intended to strengthen that business. ARM’s goal is to seed the market for ARM-based 32-bit microcontrollers as the industry makes a transition from less powerful 8- and 16-bit chips.

Microprocessor Report readers can access the full story here (2 pages/1 graphic): www.mdronline.com/mpr/h/2004/0217/180702.html. To find out more about Microprocessor Report, please visit: www.mdronline.com.

Embedded CPUs Do More, Run Faster
Markus Levy  {02/09/2004}

High-performance embedded processors accelerated faster in 2003 than their desktop PC cousins. In 2002, the nominees for our MPR Analysts’ Choice Award for High-Performance Embedded Processors started at 400MHz, but the lowest operating frequency among our 2003 nominees belongs to the 700MHz Raza Microelectronics XL7105. On the other hand, Intrinsity’s FastMIPS claims the highest operating frequency, clocking in at 2.5GHz—a 25% performance boost over the 2GHz version nominated a year ago. Fitting between these extremes are the 733MHz IBM PowerPC 750GX, the 833MHz Motorola MPC8560 PowerQUICC III, the 1GHz PMC-Sierra RM9000x2, and the 1.3GHz Motorola PowerPC MPC7457.

Clearly, if we were judging this contest solely by operating frequency, Intrinsity’s FastMIPS processor would win hands down, but of course there’s more to the contest than frequency alone. Raza’s XL7105 is a first-rate candidate for high-volume applications—and the lowest-power offering among our nominees. The MPC7457 is the performance leader, while PMC-Sierra’s 50-million-transistor RM9000x2GL provides a high degree of integration. Motorola’s MPC8560, a member of the PowerQUICC III family, represents a substantial advance over previous PowerQUICC products with its 833MHz PowerPC Book E e500 core, a 333MHz communications-processing module (CPM), and a host of networking-oriented peripherals.

Microprocessor Report readers can access the full story here (3 pages/1 graphic): www.mdronline.com/mpr/h/2004/0209/180607.html. To find out more about Microprocessor Report, please visit: www.mdronline.com.

MPC8560 Merges Winning Features
Markus Levy  {02/09/2004}

Motorola’s MPC8560 PowerQUICC processor has the right combination of performance and integration to succeed in enterprise and VPN routers, media gateways, and general embedded control. The MPC8560 is packed with a wide variety of sophisticated peripherals and internal switch fabric, including Motorola’s signature communications-processing module (CPM), a highly tuned firmware-controlled engine.

Packed into this 50 million transistor chip, built in Motorola’s 130nm HiPerMOS7 process, is an 833MHz PowerPC Book E e500 core and a 333MHz CPM, the combination of which provides for the efficient execution of a wide variety of networking-related applications. The MPC8560 also contains a 256K L2 cache and a DDR SDRAM controller, providing the plenty of bandwidth to keep the processing engines fed. The MPC8560’s performance edge comes from the combination of a coherency module and OCEAN switch fabric. On the basis of overall performance, efficiency, power consumption, and integration, Motorola’s MPC8560 wins the MPR Analysts’ Choice Award for Best High-Performance Embedded Processor in 2003.

Microprocessor Report readers can access the full story here (2 pages/1 graphic): www.mdronline.com/mpr/h/2004/0209/180608.html. To find out more about Microprocessor Report, please visit: www.mdronline.com.

Low-Power CPUs Speed Up
Max Baron - Principal Analyst  {02/09/2004}

Different chip designs rely on different power management algorithms supported by appropriate hardware and system software. No two processors are really alike. Some chips’ closeness to general-purpose DSP/MCUs allows them to be aimed at a wide spectrum of applications, such as automotive vision systems, broadband wireless systems, consumer multimedia applications, multichannel VoIP, and security and surveillance. Others are optimized for workloads exemplified by applications in computer peripherals, automotive- power-train controllers, vehicle dynamics systems, cellular communications, IP telephony, and networking equipment.

MPR explores the differences among these chips and focuses on the low-power attributes that makes them successful as low-power products.

Microprocessor Report readers can access the full story here (3 pages/1 graphic): www.mdronline.com/mpr/h/2004/0209/180609.html. To find out more about Microprocessor Report, please visit: www.mdronline.com.

TriCore 2’s Low-Power Breakthrough
Max Baron - Principal Analyst  {02/09/2004}

Announced on June 17, 2003, at In-Stat/MDR’s Embedded Processor Forum, Infineon’s TriCore 2 introduced a fresh approach in supporting real-time predictability via multithreading extensions. Multithreading allows processors to shift execution to a different resident thread when the running thread encounters blocked system resources, cache misses, and associated memory wait states. TriCore 2 takes the concept farther by placing threads in different types of on-chip memory.

Infineon’s new core architecture extensions buy its users important characteristics that differentiate the core in terms of hard real-time execution and power consumption. Although advertised as an MCU/DSP hard core, TriCore 2 is optimized for high performance running DSP workloads and for decent throughput as a microcontroller. For targeted applications, Infineon’s designers are claiming to see in-system performance improvements of 200% to 400% over single-thread architectures. At 600MHz, the core is expected to consume 300mW.

The combination of TriCore 2’s cache and memory tuned for minimal power consumption and its hard real-time capability gives this soft core advantages that few of its competitors can provide. The MPR analyst team has voted TriCore 2 the Microprocessor Report Analysts’ Choice Award for Best Low-Power Embedded Processor of 2003.

Microprocessor Report readers can access the full story here (2 pages/1 graphic): www.mdronline.com/mpr/h/2004/0209/180610.html. To find out more about Microprocessor Report, please visit: www.mdronline.com.

2003: Year of the Handheld Multimedia
Max Baron - Principal Analyst  {02/09/2004}

In 2003, different application processors followed different paths, trying to deliver the best combination of multimedia features and performance while drawing as little as possible from the available battery resources. Semiconductor vendors introduced multiple application processors. True to embedded-design strategies, each processor targeted a relatively narrow type of end-use market, and none can be faulted on features and performance, since these attributes and the accompanying price points depend on a chip’s intended socket.

Early in 2003, handheld products seemed to follow a well-defined roadmap leading toward increased power efficiency and longer battery life. Not surprisingly, considering the mechanics of the business, as 2003 unfolded, the roadmap veered away from door number one, selecting instead the alternative that supports handheld graphics, video, music, and tiny, low-megapixel cameras.

Microprocessor Report readers can access the full story here (4 pages/1 graphic): www.mdronline.com/mpr/h/2004/0209/180611.html. To find out more about Microprocessor Report, please visit: www.mdronline.com.

Nomadik Wins MPR’s Award for Best Application Processor
Max Baron - Principal Analyst  {02/09/2004}

Announced on February 3, the STMicroelectronics (ST) Nomadik chip was designed to deliver its best performance and longest battery life for users favoring multimedia and Internet communication over the lengthy processing of applications. Targeting these applications, ST’s Nomadik architects adopted for the chip a distributed processing model that uses accelerators for data-intensive functions and a general-purpose processor for applications and control.

During 2003, more than any other chip, ST’s Nomadik came closer to moving future cellphone owners toward increased use of multimedia communications and giving base-station builders an additional good reason to invest in 3G technology and beyond.

Microprocessor Report readers can access the full story here (2 pages/1 graphic): www.mdronline.com/mpr/h/2004/0209/180612.html. To find out more about Microprocessor Report, please visit: www.mdronline.com.

Media Processors Poised to Pounce
Tom R. Halfhill - Senior Editor  {02/09/2004}

After years in the doldrums, consumer electronics is exciting again. Historically, this industry thrives on paradigm shifts: radio to television, black-and-white TV to color, stand-alone TVs to home-entertainment centers, VCRs to DVDs, vinyl records to CDs, CDs to MP3s, wired telephones to wireless cellphones. Even perennial sellers like videogame consoles must be reinvented every few years to maintain their expected thrill level.

Now the consumer electronics industry is verging on more transitions. DVD players will soon give way to DVD recorders and personal video recorders (PVR), banishing the last unique feature of VCRs. CRT-based TVs, the final bastion of big vacuum tubes, seem increasingly old-fashioned next to flat-screen LCD and plasma displays. Single-function wireless phones are being replaced by multipurpose communicators that will serve as PDAs, text messengers, Web browsers, walkie-talkies, digital cameras, handheld game machines, and perhaps even videophones and TVs.

While sales of audio CDs decline, MP3 audio is going legit as major companies stampede into the music-download business. TV set-top boxes that are little more than passive channel tuners are yielding to TiVo-type devices that learn the owner’s viewing preferences and automatically record shows to match. And, of course, the troika of videogame vendors (Sony, Nintendo, Microsoft) is preparing to launch the next generation of home consoles, which will trigger a surge of new sales.

A vital difference between today’s consumer electronics and the products of yesteryear is that almost every modern device contains at least one microprocessor—and often several other chips as well. Digital technology is creating demand for new breeds of specialized media processors that can efficiently handle digital audio, motion video, high-resolution still images, and communication bitstreams.

We nominated five Media Processors for our 2003 Microprocessor Report Analysts’ Choice Awards. All the processors in this category are exceptional in some way. It was a tough category to judge, because the processors—designed for different applications—tend to be very different from each other. The five nominees are Equator Technologies’ BSP-15; Intel’s MXP5800; Motorola’s MRC6011; Philips Semiconductor’s TriMedia TM5250; and Silicon Hive’s Avispa+. For the winner, see the accompanying article, “Best Media Processor.”

Microprocessor Report readers can access the full story here (6 pages/4 graphics): www.mdronline.com/mpr/h/2004/0209/180613.html. To find out more about Microprocessor Report, please visit: www.mdronline.com.

Best Media Processor: TriMedia TM5250
Tom R. Halfhill - Senior Editor  {02/09/2004}

We have chosen the Philips TriMedia TM5250 for the Microprocessor Report Analysts’ Choice Award as the Best Media Processor of 2003. We believe the TM5250 deserves the award for proving that smart design work can keep a 10-year-old media-processor architecture competitive against newer, more-extreme architectures without sacrificing software compatibility. This achievement is particularly impressive in a field that attracts exotic designs that often aren’t bound by past architectural decisions and installed bases of software.

Philips had enough confidence in the TM5250 to subject it to the EEMBC benchmarking and certification process and publicly report the results—the only vendor among our five media-processor nominees to do so. The TM5250’s ConsumerMark scores beat every processor but Tensilica’s customized Xtensa V.

What’s notable about the EEMBC and MediaStone scores is that Philips didn’t optimize the benchmark code to use any new features of the TM5250. Instead, Philips simply ran the benchmark code as compiled for the older Nexperia PNX1300 processor. Therefore, the EEMBC and MediaStone scores probably represent the lower range of the TM5250’s future performance while confirming the processor’s compatibility with existing software.

Microprocessor Report readers can access the full story here (2 pages/1 graphic): www.mdronline.com/mpr/h/2004/0209/180614.html. To find out more about Microprocessor Report, please visit: www.mdronline.com.

Extreme CPUs Defy Conventions
Tom R. Halfhill - Senior Editor  {02/09/2004}

Microprocessor architects love a challenge. But the greatest challenge may lie in finding a challenge. The world already has plenty of general-purpose CPU architectures—too many, some say—and their performance differences are relatively minor. Another new RISC, CISC, or VLIW instruction set won’t start a revolution. What’s an ambitious CPU architect to do?

An increasingly popular answer is to throw convention out the window and invent something radically different. The trick is to find an application that can benefit from a radical CPU design and has enough market potential to justify a risky development project. Then the architect needs a cool idea, a talented design team to execute it, and a great deal of funding to pay for it. When all those planets align, the result is an extreme processor.

Microprocessor Report coined the term “extreme processor” a few years ago to describe unusual architectures or unusual implementations of conventional architectures. For the 2003 MPR Analysts’ Choice Awards, we have nominated the five best extreme processors introduced last year. All challenge the status quo, and they meet our requirement of existing as sample chips or customer-deliverable cores by the end of 2003.

Our nominees are the ClearSpeed CS301, Cradle ECE3400/MPE3400, Intrinsity FastMath, Elixent ET1, and Xelerated Xelerator X10q. ClearSpeed and Xelerated announced and sampled their processors in 2003. The Elixent ET1 is actually a Toshiba chip based on the D-Fabrix processor core from U.K.-based Elixent, which announced and delivered the hard core to Toshiba in 2003. Intrinsity announced FastMath in 2002 and began shipping the processor in 2003. Cradle announced its processors in 1999, although the chips weren’t named or introduced until 2003.

This article describes all the nominated extreme processors and summarizes the attributes that make each special. For the winner, see the accompanying article, “Best Extreme Processor.”

Microprocessor Report readers can access the full story here (6 pages/5 graphics): www.mdronline.com/mpr/h/2004/0209/180615.html. To find out more about Microprocessor Report, please visit: www.mdronline.com.

Best Extreme Processor: Xelerated X10q
Tom R. Halfhill - Senior Editor  {02/09/2004}

We have chosen Xelerated’s Xelerator X10q for the Microprocessor Report Analysts’ Choice Award as Best Extreme Processor of 2003. This award category was especially difficult to judge, because the processors are so radically different from each other and from conventional processors. We believe the Xelerator X10q deserves the award for both its extreme design, even by the standards of extreme processors, and its focused design, which doesn’t allow complexity to obscure its utility.

Although massively parallel processors are becoming almost commonplace—MPR covered several in 2003—the X10q steps forward with a massively pipelined architecture. This unusual approach is justified for a high-performance packet processor that performs repetitive tasks in serial fashion. For this application, a long, narrow architecture makes more sense than a wide architecture.

Even so, as logical as the design appears in retrospect, one must admire the moxie of a design team willing to lay a pipeline more than a thousand stages long. And with 200 identical VLIW processor cores, plus additional on-chip function units and resources, the X10q certainly isn’t statistically challenged when compared with other extreme processors, no matter what problems they’re intended to solve.

Microprocessor Report readers can access the full story here (2 pages/1 graphic): www.mdronline.com/mpr/h/2004/0209/180616.html. To find out more about Microprocessor Report, please visit: www.mdronline.com.

Conservative IP Cores Get Stung
Jim Turley  {02/09/2004}

The IP business naturally depends on the ASIC business, and ASIC starts are well down from a few years ago, likely to never rebound. That depresses demand for IP cores, yet the major players keep plugging away, and new companies entered the market in 2003. ARM, MIPS, and ARC all had new cores; IBM entered the business with PowerPC for the first time; and Elixent, Octera, Silicon Hive, and others announced their new IP. Amid a fairly dull year for new IP, some bright spots stood out.

ARM rolled out more variations of its ARM11 product line, including the first core to incorporate Thumb-2. MIPS adopted user configurability, previously the sole province of ARC and Tensilica. IBM’s PowerPC 440 was made available for license, and StarCore—finally—offered its SC1400 core, four years after announcement and well after the core appeared in Motorola’s own chips.

Silicon Hive’s Avispa+ was by far the most audacious and exotic of these CPU and DSP cores. The VLIW processor should far outrun anything the other vendors have produced, yet Silicon Hive has no experience in this market. The established payers have shown that technology isn’t everything, and Avispa+ has little else going for it.

Microprocessor Report readers can access the full story here (4 pages): www.mdronline.com/mpr/h/2004/0209/180617.html. To find out more about Microprocessor Report, please visit: www.mdronline.com.

Avispa+ Buzzes With Innovation
Jim Turley  {02/09/2004}

Silicon Hive’s Avispa and Avispa+ processor cores are way out there. Avispa+ has a whopping 768-bit instruction word and dispatches up to 60 instructions per cycle. Even at a sedate 150MHz, that’s nine billion operations per second. Avispa+ also supports user-defined instructions and hardware resources. Overall, the exotic processor design incorporates nearly every major processor-design philosophy from the past few decades, from VLIW to RISC and SIMD to CISC. The Dutch company (backed by Philips) has no track record in the IP business, and Avispa+ is far from simple to use, so the company’s real challenges may still lie ahead.

Microprocessor Report readers can access the full story here (2 pages): www.mdronline.com/mpr/h/2004/0209/180618.html. To find out more about Microprocessor Report, please visit: www.mdronline.com.

Better, Faster, Cheaper: Take All Three
Peter Glaskowsky - Editor-in-Chief  {02/09/2004}

Now that we’re safely past the Internet bubble, its collapse, and the ensuing industry recession, it’s as if all the industry’s researchers have returned to more-productive work. The same talent that was once directed to create e-commerce technology for pet-food purchasing is now giving us secure operating systems and processor-design tools that automatically adapt instruction-set extensions to the specific needs of a target application. Hardware engineers, no longer creating Internet-connected microwave ovens, are now working on microprocessors that provide extraordinarily high performance and exceptionally low power consumption.

And, of course, the process-technology gurus keep marching forward. They have much more work to do in each new-technology generation, but they stay on target—every two years or so, we get new foundries making new chips containing about twice as many transistors per square millimeter. New 90nm products are just starting to appear, most providing huge improvements over their 130nm predecessors. We couldn’t very well have “Process Technology” as a nominee for our Analysts’ Choice Awards—it’s too broad a concept—but let’s give credit where it’s due. Process technology is the greatest contributor to progress in the microprocessor industry.

Advances in Reconfigurable Computing by companies such as Ascenium and academic research efforts such as the TRIPS project at the University of Texas at Austin earned this field a nomination for the Microprocessor Report Analysts’ Choice Best Technology award. It isn’t a new idea, but there’s a lot more technology behind the idea than there was in years past.

Tensilica is planning what should be a significant step forward in configurable-processor design with a new automatic processor-extension generator for TIE, the Tensilica instruction extension language. This technology earns a Best Technology nomination because it has the potential to help designers create better extensions with less manual labor. The generator may make it possible for even the smallest companies to create their own application-specific processors.

For the problem of transistor leakage current, Transmeta—a company without a fab of its own—has developed what appears to be an effective solution that can be added to standard CMOS processes. This technology, dubbed LongRun 2, can vary the threshold voltage (Vt) of transistors hundreds of times per second in a running microprocessor. LongRun 2 is present in Transmeta’s Efficeon processor, making it the most commercial of our Best Technology nominees. The full details of the mechanism behind LongRun 2 have not yet been disclosed, but its practical value is clear.

Until recently, most software developers focused on increasing sales by supporting new applications. Microsoft, for example, spent about 20 years adding features to Windows before a companywide email memo from chairman Bill Gates launched Microsoft’s Trustworthy Computing initiative in 2002.

The most significant element of Trustworthy Computing so far is the Next Generation Secure Computing Base (NGSCB) project, announced at the Windows Hardware Engineering Conference in May 2003. NGSCB, due to ship with PCs based on Microsoft’s next major operating-system release (code-named Longhorn) by 2006, requires hardware changes to the CPU, core logic, and I/O devices.

Microsoft released a developer preview of the NGSCB code at its Professional Developers Conference in October 2003. At the same time, the company said the first release of NGSCB in Longhorn will be aimed solely at business customers, especially government users and those in the financial and health-care industries. Consumer-oriented features must wait until version 2. We expect it to take several years beyond 2006 before NGSCB-compliant hardware is included in all PCs sold, and many years could elapse beyond that point before PCs are truly secure.

The sooner, we believe, the better. We give the 2003 Microprocessor Report Analysts’ Choice Award for Best Technology to Microsoft’s Next-Generation Secure Computing Base initiative.

Microprocessor Report readers can access the full story here (3 pages; 1 graphic): www.mdronline.com/mpr/h/2004/0209/180619.html. To find out more about Microprocessor Report, please visit: www.mdronline.com.

TI Samples Three 1GHz DSPs
Peter Glaskowsky - Editor-in-Chief  {02/02/2004}

More than fulfilling its promise from May 2003, TI has introduced not one but three new 1GHz DSPs in its C64 family. The new chips represent TI’s first DSPs made with 90nm-process technology and are the fastest dedicated DSPs on the market. In May, TI showed a 130nm DSP running at 1GHz, a publicity stunt designed to draw attention to the company’s DSP roadmap. (See MPR 5/19/03-02, “TI DSP Leapfrogs TI DSP.”) Sampling 90nm DSPs at this speed will help TI capture new design wins, though the first of the new chips is not scheduled to enter volume production until 4Q04.

The three new chips are the TMS320C6414T, the ’15T, and the ’16T. Prices for these new chips will start at $189 for the ’14T in 10,000-unit quantities. TI will also build 720MHz versions of all three chips in the same 90nm-process technology for substantially lower prices ($115 and up). More information is available online at www.ti.com/1ghzsamplingp.

Microprocessor Report readers can access the full story here (<1 page): www.mdronline.com/mpr/h/2004/0202/180502.html. To find out more about Microprocessor Report, please visit: www.mdronline.com.