Processor Watch

November 1, 2004

Editor: Tom R. Halfhill

In this issue:

Intel Cancels 4GHz P4
Kevin Krewell - Senior Editor  {11/01/2004}

Intel’s changing processor roadmap this year has provided one surprise after another. Just two days after its quarterly earnings report, Intel announced it had canceled the previously delayed 4.0GHz speed grade for the Pentium 4 processor and will instead increase the Pentium 4 processor’s L2 cache size from 1MB to 2MB. Earlier this year, Intel had announced it was delaying the 4.0GHz speed grade from 4Q04 to 1Q05. It is now apparent that even delaying production did not solve a more fundamental problem with the design. With Intel chip designers moving away from frequency for performance scaling, it no longer made sense for Intel to continue sinking resources into additional Prescott development just to obtain one last speed grade.

Intel had already pushed the thermal limits to 115W for the thermal design power (TDP) of the 3.4GHz (model 550) and 3.6GHz (model 560) Pentium 4 processors in the 775-pin LGA package. At this power level, Intel’s highest-performing processors are well above the AMD Athlon 64 89W TDP. To feed enough electrical power into the processor, 523 of the 775 socket connections are used for power and grounds and are needed to deliver up to 119A into the packaged processor. Even with all this power, Intel said it couldn’t produce enough Prescott 4.0GHz processors without some redesign.

In a big win for both AMD and Intel, Microsoft announced its server licensing policy for multicore processors:
“Microsoft Corp. today (October 19, 2004) announced its decision on how the company will license server software on new servers with multicore processors expected in the market next year. Microsoft software that is currently licensed on a per-processor model will continue to be licensed per processor, not per core, for hardware that contains dual-core and multicore processors.”

Microprocessor Report readers can access the full story (3 pages, 2 figures) here: www.mdronline.com/mpr/h/2004/1101/184401.html. To find out more about Microprocessor Report, please visit: www.mdronline.com.

MIPS Takes Aim at Low-Cost DSP
Max Baron - Principal Analyst  {11/01/2004}

In the continuing evolution of its ISA, MIPS Technologies Inc. has adorned the basic MIPS architecture with quite a few extensions, each aimed at a different market segment. Multithreading (MIPS MT), security extensions (SmartMIPS), code compression (MIPS16e), high-end media extensions (MDMX), and high-performance 3D graphics (MIPS-3D) are examples of MIPS Technologies–generated extensions.

At In-Stat/MDR’s recent Fall Processor Forum  (FPF) 2004, Radhika Thekkath, director of architecture at MIPS Technologies, presented the company’s DSP application-specific extension (ASE) enhancements, intended for utilization with MIPS architecture 32-bit and 64-bit cores. The new extensions will target such applications as interactive digital TV (IDTV), DVD recorders, set-top boxes (STB), and office automation. MIPS’s cable STB business is probably the main driver for the introduction of the DSP enhancements.

Microprocessor Report readers can access the full story (3+ pages, 3 figures) here: www.mdronline.com/mpr/h/2004/1101/184402.html. To find out more about Microprocessor Report, please visit: www.mdronline.com.

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