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Embedded
Processor Watch
MicroDesign
Resources --- July 20, 1999 #57
Editor:
Tom Halfhill
In This
Issue:
- IBM's
PowerPC 405GP Introduces CoreConnect Bus
- Mips
and Chartered Form Unique Partnership
- Industry
Resources: Microprocessor Forum Early Registration
- New
Embedded IC Announcements
IBM's
PowerPC 405GP Introduces CoreConnect Bus IBM's latest PowerPC
processor, the 405GP, is a highly integrated system on a chip
(SOC) with PCI, Ethernet, an SDRAM controller, and the first
implementation of CodePack code compression. What's potentially
more important is that IBM is using the 405GP to kick off
the CoreConnect bus -- an on-chip bus architecture for SOCs
that IBM is offering free to all comers.
CoreConnect
isn't exactly new. Over the past two years, IBM has designed
more than 20 ASICs by using the bus to link CPU cores and
macros from its Blue Logic library. What's new is that IBM
has formalized the bus architecture for external use, has
made it more CPU independent, and is freely licensing it to
other chip companies, intellectual-property designers, and
tool vendors.
IBM says
the license has no strings attached: no up-front fees, no
manufacturing fees, and no royalties. The first CoreConnect
licensees are Cadence, Lexra, Mentor Graphics, Stellar Semiconductor,
Summit Design, and Technical Data Freeway. IBM has formed
a CoreConnect user group to help steer future development
of the bus.
It's not
hard to see how IBM stands to gain from openly licensing CoreConnect.
IBM has a library of cores and macros that already work with
CoreConnect, and IBM's chip designers have years of experience
with the bus. Other suppliers of cores and macros that adopt
CoreConnect would have to catch up.
But it's
hard to ignore the overlap between CoreConnect and the Virtual
Socket Interface Alliance (VSIA), not to mention ARM's Advanced
Microprocessor Bus Architecture (AMBA), IDT's IPBus, Motorola's
IP Bus (no relation to IDT's), and other on-chip interfaces
vying for wider acceptance.
As with
most competitions of this sort, technical specifications are
only one consideration. The winner -- if, indeed, there is
a winner -- will likely prevail on the strengths of marketing
muscle, mindshare, and moxie. What seems more likely is that
all of the competing standards will fracture the market, delaying
or derailing attempts to establish a neutral standard on which
everyone in the industry can agree.--T.R.H. (The full version
of this article appeared in the July 17 issue of Microprocessor
Report.)
Mips
and Chartered Form Unique Partnership
Mips Technologies
and Chartered Semiconductor have formed a new partnership
that allows customers to use Mips's latest CPU cores without
negotiating a regular MIPS license or porting the soft cores
to an IC process. Mips and Chartered say the unique arrangement
will expand the market for embedded MIPS processors while
saving customers the time and cost of porting cores to silicon.
Under
the terms of the agreement, Chartered is a licensed foundry
partner for the new MIPS32 4Kc and 4Kp Jade cores (see Embedded
Processor Watch #51, http://www.MDRonline.com/q/epw/issues/epw_51.html).
Chartered will port the cores to its 0.25-micron process by
4Q99 and later to a 0.18-micron process in 1H00 and a copper
0.18-micron process (developed with Lucent) in 2H00. Customers
who want to integrate the cores with standard-cell macros
can deal directly with Chartered by signing a simplified MIPS
license. In return, they'll get the timing models, abstract
files, and test vectors needed to design around the MIPS core.
Chartered will drop the core into the customer's design and
manufacture the wafers. Customers pay predefined royalties
to Mips based on volume.
Besides
saving upfront licensing fees, porting costs, and development
time -- not to mention the risk of botching a silicon port
-- customers are also insulated from Mips's intellectual property.
They can develop their own designs without fear of "contamination."
As a spokesman for Chartered put it, "They're not any more
contaminated than an Intel customer who buys a Pentium."--T.R.H.
(The full version of this article appeared in the July 17
issue of Microprocessor Report.)
Industry
Resources: Microprocessor Forum Early Registration
This week
is your last chance -- sign up by July 26 to take advantage
of early registration prices for the 12th annual Microprocessor
Forum. The forum will be held October 4-8, 1999, at the Fairmont
Hotel in San Jose. The two-day conference will include the
first disclosures of more than 15 microprocessors, including
new embedded chips and cores from IBM, Hitachi, Mips Technologies,
and National Semiconductor. Other companies will describe
new DSPs, 3D-graphics accelerators, and media processors.
For those
interested in PC processors, Intel will reveal the microarchitecture
of Merced, its first IA-64 processor, and RISC vendors will
disclose the new processors and techniques they will use to
distinguish their offerings. In addition, the seminar program
includes six seminars on PC processors, IA-64, 3D graphics,
embedded processors, and DSPs.
Early
registration prices of $1,395 for the conference and $698
per seminar are available until July 26. For more information
and to register, go to http://www.MDRonline.com/x/mpf1
or call 800.700.4004 or 707.824.4004.
New
Embedded IC Announcements
Trio
(Aplio): a tri-processor chip for adding audio and telephony
functions to Internet appliances, digital music players, and
other trendy consumer products. The Trio has a 32-bit RISC
CPU (an ARM core), two 16-bit fixed-point DSPs (Oak cores),
several on-chip peripherals, and interfaces for keyboards
and DRAM. Each DSP core has 98K of memory. It's compatible
with Aplio's software modules for modems, voice compression,
and echo cancellation. Price: $20/100,000; production: 4Q99.
Call Aplio at 888.642.7546 or go to http://www.aplio.com.
AD9814
(Analog Devices): a three-channel, 14-bit analog signal processor
for CCD imaging systems in scanners and copiers. It includes
everything necessary for performing three-channel signal processing,
including input clamps, correlated double samplers, offset
digital-to-analog converters, and programmable gain amplifiers
for each color RGB channel. Price: $8.00 or $20.00/1,000;
production: now. Call ADI at 800.262.5643 or go to http://www.analog.com.
SPT5510
(Signal Processing Technologies): a 16-bit digital-to-analog
converter that operates at 200 MHz. Its settling time is 35
ns to 16-bit accuracy (0.00076%) or 15 ns to 14-bit accuracy
(0.0031%) with low-glitch impulse energy of 30 pV-s. Price:
$39.50/1,000; production: now. Call SPT at 800.643.3778 or
go to http://www.spt.com.
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