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Embedded
Processor Watch
MicroDesign
Resources --- July 27, 1999 #58
Editor:
Tom Halfhill
In This
Issue:
- SandCraft
Adds Multimedia Extensions
- Another
System On a Chip: IBM PowerPC 405GP
- Industry
Resources: Intel Tells All at IDF
- New
Embedded IC Announcements
SandCraft
Adds Multimedia Extensions
Microprocessors
without multimedia extensions are becoming as rare as unemployed
engineers in Silicon Valley. Equally rare are embedded-processor
companies that don't have a system on a chip (SOC) and "post-PC"
strategy. One of the latest companies to swell the tide is
SandCraft, which is introducing a new MIPS-compatible embedded
CPU core with digital-signal-processing (DSP) and single-instruction,
multiple-data (SIMD) extensions.
Although
the new SR1-GX is compatible with the MIPS-IV instruction
set, SandCraft is not a MIPS licensee. SandCraft's first customer
for the core, LSI Logic, does have a MIPS license. LSI is
integrating the SR1-GX in an SOC that a consumer-electronics
company has commissioned for an advanced digital set-top box.
The SR1-GX
is an enhanced version of the SR-1 core that SandCraft unveiled
last fall (see Embedded Processor Watch
#24, http://www.MDRonline.com/q/epw/issues/epw_24.html).
It's a superscalar, out-of-order machine that can dispatch
as many as four integer and two floating-point instructions
per cycle. It has dynamic branch prediction and configurable
L1 caches that can range in size from 8K to 64K. The caches
can be direct mapped or two-, four-, or eight-way set-associative.
SandCraft
says the customer originally wanted an embedded processor
core that could run at 500-600 MHz to achieve the desired
level of performance. Instead, SandCraft produced simulations
to demonstrate that extensions to the SR1 core could deliver
the same performance at 400 MHz while reducing costs and power
requirements. SandCraft added an integer multiply-accumulate
(MAC) unit, 16 new instructions for fixed-point DSP operations,
a 64-bit FPU, 32 extra registers for single-precision floating-point
numbers, and several new 32-bit SIMD instructions known as
the Vector3D extensions.
Neither
SandCraft nor LSI will reveal anything more about the customer,
but the ability to run 3D video games appears to be a key
part of the specification. It's unlikely that the customer
is Nintendo, Sony, or Sega -- those companies have already
settled on IBM, Toshiba, and Hitachi, respectively, to supply
the CPUs for their next-generation game consoles. So until
later this year, SandCraft's first design win for the SR1-GX
will remain a mystery.
The SR1-GX
doesn't come close to the performance of the Emotion Engine
chip that Sony and Toshiba designed for the next-generation
Sony PlayStation. The Emotion Engine (see Embedded
Processor Watch #48, http://www.MDRonline.com/q/epw/issues/epw_48.html)
can crunch 6.2 GFLOPS at 300 MHz -- almost four times the
performance of the SR1-GX at a 25% slower clock speed. The
Hitachi SH7750 in Sega's Dreamcast (see Embedded
Processor Watch #2, http://www.MDRonline.com/q/epw/issues/epw2.html)
can execute 1.2 GFLOPS at 167 MHz, which would scale to about
180% of the performance of the SR1-GX at a comparable clock
frequency. Still, considering the SR1-GX's advantages in die
size and power consumption, it acquits itself well in very
fast company.--T.R.H. (The full version of this article appeared
in the July 17 issue of Microprocessor Report.)
Another
System On a Chip: IBM PowerPC 405GP
IBM's
new PowerPC 405GP is by far the fastest, most highly integrated
chip in the PowerPC 400 series. It's also a good advertisement
for IBM's CoreConnect bus and Blue Logic macro library. (See
Embedded Processor Watch #57, http://www.MDRonline.com/q/epw/issues/epw_57.html)
Other
members of the PowerPC 400 family have no on-chip peripherals
and stroll at clock frequencies of 25-80 MHz. The 405GP is
a genuine system on a chip (SOC) that's loaded with useful
peripherals. It's the first PowerPC chip based on the 405
core and will zip along at 200-266 MHz.
Unlike
earlier 400-series cores, which have minimal three-stage pipelines
to conserve every milliwatt of power, the 405 has a more conventional
five-stage pipeline that can reach higher clock frequencies.
It also has a 16K instruction cache, an 8K data cache, 4K
of additional on-chip memory in the form of SRAM, and a function
unit that executes 24 different multiply-accumulate (MAC)
instructions -- a feature that no modern processor can do
without, it seems.
The 405GP
surrounds the 405 core with a wealth of on-chip peripherals,
all joined together by the CoreConnect bus. In this implementation,
the CoreConnect processor local bus is 64 bits wide and runs
at 100 MHz -- half of the core's 200-MHz frequency. A second
version of the chip will have a 133-MHz local bus and a 266-MHz
core.
IBM designed
the 405GP for Ethernet switches, low-cost routers, cable modems,
network printers, base stations, remote-access devices, and
similar applications. Its Ethernet port sets it apart from
other embedded processors in this performance class that have
a PCI bus and an SDRAM interface -- such as Hitachi's SuperH
7751 and Motorola's 8240. At $41, the 200-MHz 405GP is competitively
priced with the 167-MHz SH7751 ($39) and the 200-MHz 8240
($55).--T.R.H. (The full version of this article appeared
in the July 17 issue of Microprocessor Report.)
Industry
Resources: Intel Tells All at IDF
Get the
latest word straight from the horse's mouth at the Intel Developer
Forum. The fall edition will be held on August 31-September
2 at the Palm Springs (Calif.) Convention Center. The conference
includes 13 technology tracks describing Intel's technology,
including tracks on network processors and other embedded
topics. Registration costs $995 for the three-day conference.
For more information or to register, contact Intel at 888.266.7649
or click over to http://developer.intel.com/design/idf.
New
Embedded IC Announcements
CS4928
(Cirrus Logic): A single-chip programmable DSP that supports
both high-definition compatible digital (HDCD) and digital
theater sound (DTS) standards for high-end automotive sound
systems. Price: $15/10,000; production: now. Call Cirrus Logic
at 510.623.8300 or go to http://www.cirrus.com/.
THS1206
(Texas Instruments): A 12-bit ADC with 16 words of on-chip
FIFO memory and four sample-and-hold amplifiers; optimized
for interfacing with a DSP for embedded applications. Price:
$13/1,000; samples: now; production: 3Q99. Call TI at 800.477.8924
x4500 or go to http://www.ti.com/.
M16C/24
(Mitsubishi): A 16-bit USB 1.1 microcontroller for full-speed
(up to 12 Mbit/s) peripherals; supports all USB transfer types
(isochronous, bulk, control, and interrupt) with FIFO sizes
of 32-128 bytes. Price: $5.30/10,000; samples: 3Q99; production:
Q499. Call Mitsubishi at 408.730.5900 or go to http://www.mitsubishichips.com/.
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