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Embedded Processor Watch



MicroDesign Resources --- August 17, 1999 #61

Editor: Tom Halfhill

In This Issue:

  • Alliance Detours Into Routers
  • Teak Fills Gap Between Oak and Palm
  • Cahners MicroDesign Resources Seeks New Analysts
  • Industry Resources: SMTA Mounts Packaging Conference
  • Embedded IC Announcements

Alliance Detours Into

When the only tool you've got is a hammer, every job looks like a nail. So perhaps it's no surprise that a memory company's first processor would devote fewer than 1% of its 61 million transistors to logic.

Alliance Semiconductor's new IPRP-V4 (Internet Protocol Routing Processor) architecture is designed to solve a growing problem: managing and searching IP forwarding tables to keep up with high-end routers and fiber-optic backbones. It's a significant departure for Alliance, which was founded in 1985 but until now has dealt exclusively in DRAM, SRAM, and flash memory.

IPRP-V4 chips won't replace a router's general-purpose CPU. Instead, they are application-specific coprocessors that would most likely displace the ASICs in core routers -- the high-speed routers that act as traffic cops on the fiber backbones of enterprise networks and the Internet. Some members of the IPRP-V4 family might also be suitable for the smaller edge routers that handle packet-switching chores around the fringes of the network.

There are nine chips to accommodate a variety of routers: three speed grades (66 MHz, 50 MHz, and 33 MHz) with three amounts of on-chip memory for the routing tables (648K, 324K, and 162K, which store 64K, 32K, or 16K table entries, respectively).

Alliance says the chips are fast enough to keep up with multiported gigabit routers at wire speeds. At 66 MHz, an IPRP-V4 chip can feed 28 routing ports at 1 Gbit/s per port, or 10 optical-carrier OC-48 ports at 2.4 Gbits/s per port, or three OC-192 ports at 9.6 Gbits/s per port. The highest-density IPRP-V4 chips have enough memory to store the entire routing table of a major Internet hub such as MAE West -- about 61,000 entries. Future routers that need even more capacity can gluelessly cascade up to six of the 66-MHz chips, or eight of the 33/50-MHz chips.

By adding a small amount of logic to some fast SRAM, Alliance has created a niche product that can sell for a higher price than SRAM alone. Yet the cost is still low for a chip that's going into an expensive router -- low enough, perhaps, to undercut the more processor-centric solutions from Intel and other competitors. If Alliance can score some small design wins and work its way up, the company's detour into network processing won't be a wrong turn.--T.R.H. (The full version of this article appeared in the August 2 issue of Microprocessor Report.)

Teak Fills Gap Between Oak and Palm

To meet the growing needs of ASIC vendors for more performance and ease of integration, leading DSP core vendor DSP Group has released Teak -- the follow-on to TeakLite. The Teak family is the third generation in the company's portfolio of licensable DSP cores and is supposed to fill the gap between the company's low-end Pine and Oak and its high-end Palm. The Teak family maintains binary compatibility with the previous two generations (Pine and Oak).

TeakLite and Teak offer different performance levels. TeakLite is targeted at cost-sensitive applications, such as modems, cell phones, and VoIP (voice-over-IP) terminals. Teak is aimed at higher-performance applications, such as third-generation cellular phones, fast modems, and VoIP gateways. Both cores are 16-bit fixed-point DSPs.

Unlike Pine and Oak, Teak and TeakLite are fully synthesizable soft macros. Teak is expected to run at 140 MHz with a sustained MIPS rating of 180 Oak-equivalent MIPS in a 0.25-micron process and 110 MHz (140 MIPS) in a 0.35-micron process. Teak is designed in a single-edge clocking system, which allows the use of full- or partial-scan testing methods.--K.Y. (The full version of this article appeared in the August 2 issue of Microprocessor Report.)

Cahners MicroDesign Resources Seeks New Analysts

Cahners MicroDesign Resources, the publisher of this newsletter as well as Microprocessor Watch and Microprocessor Report, and the organizer of Microprocessor Forum and Embedded Processor Forum, is seeking new analysts to join its team. Positions focused on either embedded processors or PC processors are available. Our analysts are highly visible thought leaders in the microprocessor industry and frequently meet with top architects and executives. Candidates must have at least five years of relevant design, marketing, or analysis experience as well as excellent communication skills. For more information, contact Linley Gwennap (mailto:linley@mdr.cahners.com).

Industry Resources: SMTA Mounts Packaging Conference

Learn about the latest advances in surface-mount technology, high-density interconnect, and chip-scale packaging at the SMTA International conference on September 12-16 in San Jose. Sponsored by (you guessed it) the SMTA (Surface Mount Technology Association) users group, the conference will have nearly 60 technical sessions, tutorials, and workshops across six tracks: SMT manufacturing, advanced packaging, soldering, process control, substrates, and contract manufacturing.

The early (before 8/27) registration fee is $795 for a five-day pass or $295 for one day. For more information or to register, call 877.232.8845 or go to http://www.smta-international.com/.

 

Embedded IC Announcements

PIC16C712 (Microchip): an 8-bit one-time-programmable (OTP) microcontroller with 1024 x 14 bits of OTP memory, 128 bytes of user RAM, 13 I/O ports, a PWM module, brown-out detection, and three timers. Price: $2.31/1,000; production: now. Call Microchip at 480.786.7668 or go to http://www.microchip.com/.

PCM1732 (Burr-Brown): a single-chip DAC for high-definition compatible digital (HDCD) audio players in homes and cars; combines HDCD decoding and digital filtering with technology licensed from Pacific Microsonics. Price: $5.33/1,000; production: now. Call Burr-Brown at 800.548.6132 or go to http://www.burr-brown.com/.


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