Embedded Processor Watch

Editor: Tom Halfhill

In This Issue:

• Sun Reveals Secrets of "Magic"
• Industry Resources: Read Any Good e-Books Lately?
• Industry Resources: ICE on CMP for You and Me
• Embedded IC Announcements

Sun Reveals Secrets of "Magic"

If there were any doubts that VLIW has succeeded RISC as the most important influence on new microprocessor architectures, they vanished this month when Sun pulled the latest example out of its hat: MAJC (pronounced "magic"), the Microprocessor Architecture for Java Computing.

Sun says it conjured MAJC for the coming wave of networked information appliances -- advanced set-top boxes, screen phones, automotive-navigation systems, home video-game consoles, and the like. There's no technical reason that a MAJC chip couldn't power a PC, workstation, or server, but Sun is pursuing the nebulous post-PC market for obvious business reasons: it's more trendy, and the path of least resistance rarely leads through the kingdom of Wintel. Although Sun won't disclose the first MAJC chip until Microprocessor Forum in October, it described the instruction-set architecture at the Hot Chips conference last week.

MAJC offers yet another spin on the VLIW technology explored by mainframe engineers in the 1960s and pioneered by Multiflow, Cydrome, and Culler in the 1980s. Since then, VLIW has evolved in a variety of ways, forming the basis for such architectures as Intel's IA-64, Philips's TriMedia, Equator's MAP1000, Fujitsu's FR-V (see Embedded Processor Watch #60, http://www.MDRonline.com/q/epw/issues/epw_60.html), and high-end DSPs from Texas Instruments, StarCore, and Analog Devices (see Embedded Processor Watch #49, http://www.MDRonline.com/q/epw/issues/epw_49.html).

All of these architectures have two things in common: bundles or packets of multiple instructions and compiler-directed parallel execution. This contrasts with today's superscalar RISC and CISC architectures, which handle instructions as discrete units and schedule the instructions for parallel execution at run time, often by reordering them on the fly. MAJC is a typical VLIW architecture in the sense that it too relies on instruction packets and smart compilers instead of complex control logic.

Sun's contribution to the art appears to be a Java-friendly (though not Java-specific) architecture that's particularly amenable to multithreading and chip multiprocessing (CMP) -- the integration of multiple CPU cores on a single die. This should be a happy marriage, because Java is inherently a multithreaded language for multitasking operating systems. It also means that MAJC is a highly scalable architecture designed to take advantage of deep-submicron IC processes, because a single processor can integrate up to 1,024 easily cloned CPU cores.

But the name MAJC is misleading. Although it has some features to improve the performance of Java virtual machines and just-in-time (JIT) compilers, MAJC is a general-purpose architecture that can run software written in any language. Yet it has virtually nothing in common with Sun's SPARC, a seminal RISC architecture for general-purpose computing, or Sun's Java chips, which have a stack-based architecture and a bytecode-native instruction set.

According to Sun's cycle-accurate simulations, a MAJC processor should outperform a comparable RISC processor, even without using CMP. But we expect Sun's first MAJC chip to integrate at least two cores -- partly to show off what the architecture can do and partly to inspire potential licensees. At 300-500 MHz, such a chip could match the superlative performance of the Emotion Engine processor that Sony and Toshiba designed for the new PlayStation (see Embedded Processor Watch #48, http://www.MDRonline.com/q/epw/issues/epw_48.html). But with its large, orthogonal function units and multiple cores, the MAJC chip could match the Emotion Engine's enormous die size and manufacturing cost, too. That's probably why Sun says the first chip isn't intended for very low cost or battery-powered products.

There's no doubt that MAJC is a highly innovative and versatile architecture. But winning acceptance for MAJC will require some clever sleight of hand. Embedded developers already have plenty of capable architectures to choose from, and MAJC competes with them all. Sun might need real magic to convince customers that MAJC has substance and won't disappear in a puff of smoke.--T.R.H. (The full version of this article appeared in the August 23 issue of Microprocessor Report.)

Industry Resources: Read Any Good e-Books Lately?

Turn to the next chapter in publishing at the National Institute of Standards and Technology's Electronic Book 99. The event -- to be held September 21-22 in Gaithersburg, Maryland -- covers handheld e-books, Web-based e-books, display issues, storage technologies, and distribution methods. Speakers at the workshop include component and system vendors, software tool developers, and publishers. There will be an evening reception and numerous industry exhibits. Your tax dollars are at work: the cost of the two-day workshop is just $225. For more information or to register electronically, go to http://www.nist.gov/ebook99.

Industry Resources: ICE on CMP for You and Me

The fabrication weenies at Integrated Circuit Engineering (ICE) have produced a new report, "CMP: Chemical Mechanical Planarization." The book covers the latest advances, such as CMP for copper and low-k materials, providing application details for engineers and easy overviews for nonengineers. (If you are in the latter camp, we are talking about how to make chips really flat.) The report discusses the equipment and techniques used, as well as market trends. The report is available on paper or CD-ROM for $995; extra copies cost $695. Contact ICE (Scottsdale, Ariz.) by phone at 480.515.9780 or on the Web at http://www.ice-corp.com.

Embedded IC Announcements

PIC16C716 (Microchip): an 8-bit one-time-programmable (OTP) microcontroller with 2048 x 14 bits of OTP memory, 128 bytes of user RAM, 13 I/O ports, a PWM module, brown-out detection, and three timers. Price: $2.61/1,000; production: now. Call Microchip at 480.786.7668 or go to http://www.microchip.com/.

CS49300 (Cirrus Logic): a single-chip DVD audio decoder for home and professional DVD players; supports multichannel PCM, MPEG, Dolby Digital, DTS, Meridian Lossless Packing (MLP) compression, and 24-bit/192-KHz sampling. Price: $15/10,000; samples: now; production: 3Q99. Call Cirrus Logic at 510.623.8300 or go to http://www.cirrus.com/.