Embedded Processor Watch

Editor: Tom Halfhill

In This Issue:

• Arm Announces Two Soft Cores With DSP
• Lexra LX5280 Core With Radiax Offers High Performance
• Industry Resources: Guy Kawasaki, Drill Sergeant?
• Industry Resources: Designing Systems-on-a-Chip
• Embedded IC Announcements

Arm Announces Two Soft Cores With DSP

Arm has unveiled two synthesizable cores based on the ARM9E announced at Embedded Processor Forum last spring (see http://www.MDRonline.com/q/epw/issues/epw_56.html). Both new cores -- the ARM966E-S and the ARM946E-S -- include the ARM9E's digital-signal processing (DSP) extensions. The '966E-S is a cacheless core that relies instead on tightly coupled on-chip SRAM (up to 64M), while the '946E-S is a more conventional design with four-way set-associative caches. Arm expects chips based on these cores to run at about 160 MHz in a 0.25-micron IC process and at least 200 MHz in 0.18 micron. The RTL code is scheduled for delivery in 1Q00, and LSI is one of the first licensees.-- T.R.H. (The full version of this article appeared in the August 23 issue of Microprocessor Report.)

Lexra LX5280 Core With Radiax Offers High Performance

Lexra is expanding its portfolio of embedded options by adding DSP capabilities to its latest MIPS-like core. Lexra's DSP instruction set, dubbed Radiax, will appear first in the LX5280, which is designed for low-cost, low-power system-on-a-chip (SOC) devices (see http://www.MDRonline.com/q/epw/issues/epw_47.html). Potential applications include third-generation cell phones, DSL modems, wireless base stations, and voice-over-IP (VoIP) gateways.

Lexra has signed up 15 licensees for its cores but is not ready to disclose their names. (Lexra is not a MIPS licensee itself and has skirmished with Mips Technologies over various legal issues. Lexra's cores execute virtually all MIPS instructions except unaligned loads and stores.) The standard MIPS instruction set is well suited for control code, and the 36 new Radiax instructions are worthwhile additions. Lexra plans to license Radiax to MIPS licensees royalty-free.

Lexra expects a performance-optimized LX5280 to run at 200 MHz in a typical 0.18-micron IC process. The company expects the core area (excluding memories) to be 6 square millimeters and the power dissipation to be 225 mW at 1.8 V. A lower-power chip could run at 50 MHz and dissipate 20 mW at 1.0 V in the same process. In simulations, the LX5280 executes some key DSP loops with impressive results -- comparable to leading DSPs. Lexra expects the synthesizable RTL, along with a configuration tool, synthesis and timing scripts, testability scripts, and a regression suite, to be available in November. A layout version with a GDS2 database will be ready next February.--Krishna Yarlagadda (The full version of this article appeared in the August 23 issue of Microprocessor Report.)

Industry Resources: Guy Kawasaki, Drill Sergeant?

Learn how to build a great company from scratch at Garage.com's Bootcamp for Startups. Leaders from the high-tech community will talk about their startup experiences at this bicoastal event, running September 13-14 in San Francisco and October 5-6 in Boston. Get tips on finding funding and, oh yes, actually running a small company. Speakers include chief Macolyte Guy Kawasaki, S3 founder Dado Banatao, microprocessor co-inventor Federico Faggin, financier Frank Quattrone, and author Geoffrey Moore ("Crossing the Chasm"). Note that many are speaking at only one of the two events; check agenda for details. The early (before 9/10) registration fee is $795 for the two-day event. For more information or to register, set your browser to www.garage.com/bootcamp.

Industry Resources: Designing Systems-on-a-Chip

Check out the latest technology for highly integrated devices at the IEEE's International ASIC/SOC Conference. The show will be held September 15-18 in Washington, D.C. (Last week's Embedded Processor Watch erroneously reported the location as Rochester, N.Y.) It will be keynoted by LSI Logic CEO Wilf Corrigan and features more than 50 papers on interconnect modeling, logic design, physical design, mixed-signal design, low-power design, verification, and applications. Saturday's schedule includes six half-day seminars providing more in-depth looks at these topics. Registration fees are $480 for the conference and $180 for the seminar day. Discounts are available for IEEE members and for students. For more information, call 301.527.0900 or access http://asic.union.edu/.

Embedded IC Announcements

SAFE ST28 (VLSI): a wide-area-network framer for ATM and frame-relay devices that has 28 independent T1 framers capable of handling a fully channelized DS3 line; designed for integrated voice/data applications. Price: $168/10,000; production: now. Call VLSI at 800.438.2973 or go to http://www.vlsi.com/.

CN8236/8237 (Conexant Systems): two ATM segmentation-and-reassembly (SAR) controllers that add Utopia Level 2 support for multiported network equipment; the CN8237 supports OC-12 line rates. Price: $98-$190/1,000; production: 4Q99 (CN8236) and 1Q00 (CN8237). Call Conexant at 800.854.8099 or go to http://www.conexant.com/.