Embedded Processor Watch

Editor: Tom Halfhill

*** Special Seminar Invitation: "Trends in Microprocessors for Embedded Applications"

Tom R. Halfhill, senior editor of Microprocessor Report and the editor of this newsletter, will present his seminar "Trends in Microprocessors for Embedded Applications" on November 4 at the Westin Hotel in Santa Clara. The seminar will be updated with the latest information from this month's Microprocessor Forum, including the MIPS64 5Kc synthesizable core, the IBM PowerPC 440 core with Book E, and the Hitachi/STMicroelectronics SH-5 architecture. The seminar runs from 9 a.m. to 5:30 p.m.; registration is $795. For more details or to register, go to http://www.MDRonline.com/dm or call 800.700.4004 or 707.824.4004.

In This Issue:

• MIPS32 4Km Core Has Fast MAC
• Triscend Ships First Reconfigurable 8051
• Industry Resources: Hot Tips for Cool Chips
• Industry Resources: Cahners MDR Dinner Meeting and Seminars
• Embedded IC Announcements

MIPS32 4Km Core Has Fast MAC

Mips Technologies' new 4Km is the third synthesizable core to adopt the MIPS32 instruction-set architecture introduced earlier this year for embedded applications. The 4Km combines features of the MIPS32 4Kc and 4Kp cores, which were disclosed at Embedded Processor Forum in May (see Embedded Processor Watch #51, http://www.MDRonline.com/q/epw/issues/epw_51.html).

The 4Km is almost identical to the 4Kc and 4Kp, except for two features: memory management and math. The 4Km manages memory by using block-address translation (BAT), and it has a fast integer multiply-divide unit. In contrast, the 4Kc has a memory-management unit (MMU) with a 32-entry translation-lookaside buffer (TLB) instead of a BAT, while the 4Kp has a slower, iterative multiply-divide unit instead of the fast multiplier.

The 4Km is a relatively minor variation on the existing 4Kc and 4Kp cores, but it underlines Mips's renewed push into the embedded-processor market.--T.R.H. (The full version of this article appeared in the October 6 issue of Microprocessor Report.)

Triscend Ships First Reconfigurable 8051

When nothing but a malleable microcontroller will do, Triscend has the solution: a chip that combines an 8051-compatible processor core with reconfigurable logic. The first member of Triscend's E5 family -- called the TE520 -- is now in full production, with additional members to follow next year. Triscend (see Embedded Processor Watch #21, http://www.MDRonline.com/q/epw/issues/epw_21.html) is also developing a version based on a much more powerful 32-bit ARM7TDMI core.

In the meantime, the 40-MHz TE520 isn't exactly a speed demon at 10 MIPS, but start-up Triscend hopes it will fill a niche. The chip has 2,048 configurable-logic cells (enough for about 25,600 gates) and 40K of on-chip RAM. It's intended for quick-to-market embedded applications that need a custom system on a chip but that probably won't reach high enough production volumes to justify the expense of developing an ASIC. Customers can configure the TE520's logic to create on-chip peripherals specific to their applications -- and even to reconfigure the logic in the field if the applications change.

The TE520 isn't the most economical way to build an 8051-based system, but some embedded applications undoubtedly can take advantage of its unique features.--T.R.H. (The full version of this article appeared in the October 6 issue of Microprocessor Report.)

Industry Resources: Hot Tips for Cool Chips

Low power consumption is critical for most embedded processors, and you can learn about the latest design techniques at a six-hour seminar entitled "Cool Chips Tutorial: An Industrial Perspective on Low-Power Processor Design." The seminar is part of the 32nd annual IEEE/ACM International Symposium on Microarchitecture (Micro-32) in Haifa, Israel, November 16-18. The seminar will have speakers from Arm, Compaq's Alpha development group, Intel, Lucent, Motorola, Texas Instruments, and other companies. For more information, go to http://huron.cs.ucdavis.edu/Micro32/homepage.html.

Industry Resources: Cahners MDR Dinner Meeting and Seminars

Cahners MicroDesign Resources, the publisher of Microprocessor Report and Embedded Processor Watch, is sponsoring two seminars and a dinner meeting at the Westin Hotel in Santa Clara on Thursday, November 4. The seminars are "Trends in Microprocessors for Embedded Applications" by Tom R. Halfhill, senior editor, Microprocessor Report, and "Processors for PCs: A Business and Strategy Perspective" by Michael Slater, principal analyst, Cahners MDR. The seminars are from 9 a.m. to 5:30 p.m.

The dinner presentation will be "Processor Options for Digital TV Applications" by Cees Hartgring, vice president and general manager of Philips' TriMedia business line, and Gert Slavenburg, fellow and chief architect of the TriMedia processor. Registration fees for one seminar and the dinner meeting: $845; for one seminar only: $795; for the dinner meeting only: $99. For more details or to register, go to http://www.MDRonline.com/dm or call 800.700.4004 or 707.824.4004.

Embedded IC Announcements

PSD8x4Fx (Waferscale): three flash-memory support chips for eight-bit microcontrollers, such as Intel's 8051 or Motorola's 68HC11. Each has 256KB of in-system programmable flash memory and 3,000 gates of programmable logic, plus a JTAG programming interface. One device has a second flash array of 32KB, and another has the 32-KB flash array plus 2KB of SRAM. Prices: $6.92-$7.59/10,000; production: now. Call Waferscale at 510.656.5400 or go to http://www.waferscale.com/.

ADSP-21mod980 (Analog Devices): a 24-port communications processor for Internet gateway equipment. It has 2 Mbits of SRAM, consumes only 60 mW per port, and measures 1.9 inches square in a 352-lead BGA package. The included software supports V.90, K56Flex, V.34, ISDN, fax-over-IP, and voice-over-IP protocols. Price: $265/1,000; samples: now; production: 4Q99. Call ADI at 800.262.5643 or go to http://www.analog.com/dsp.

AD7707 (Analog Devices): a 16-bit sigma-delta analog-to-digital converter (ADC) with two channels that accept +/-100 mV full-scale input signals and a high-level input channel for ranges up to +/-10 V. Price: $4.46/1,000; production: now. Call ADI at 800.262.5643 or go to http://www.analog.com/.