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Embedded Processor Watch



MicroDesign Resources --- October 26, 1999 #71

Editor: Tom Halfhill

In This Issue:

  • PowerPC 440 Core Hits 1,000 Dhrystone MIPS
  • Massana's DSP Coprocessor Bolts Onto CPUs
  • Industry Resources: Cahners MDR Dinner Meeting and Seminars
  • Embedded IC Announcements

PowerPC 440 Core Hits 1,000 Dhrystone MIPS

IBM's new PowerPC 440 core is the first officially announced embedded-processor core that's projected to hit 1,000 Dhrystone MIPS. The 440 achieves some other firsts as well. It's the first core to implement Book E, the new embedded PowerPC architecture defined by IBM and Motorola (see Embedded Processor Watch #50, http://www.MDRonline.com/q/epw/issues/epw_50.html). And it's the first core to use a 128-bit version of IBM's on-chip CoreConnect bus (see Embedded Processor Watch #57, http://www.MDRonline.com/q/epw/issues/epw_57.html).

Principal architect Tom Sartorius described the 440 at this month's Microprocessor Forum. Although he said the design team didn't ignore such concerns as power consumption and die area, their primary goal was to exceed the performance of IBM's PowerPC 405 core by about 3x, just as the 405 core exceeds the performance of the 401 core by the same factor. Actually, the 440 outperforms the recently announced 405GP chip (see Embedded Processor Watch #58, http://www.MDRonline.com/q/epw/issues/epw_58.html) by nearly 4x on the Dhrystone 2.1 benchmark. The 440 is expected to hit 1,000 MIPS at 555 MHz, while the 405GP delivers 252 MIPS at 200 MHz.

Together with the Book E improvements, CoreConnect bus, and CAMRAM-based primary caches, the 440's performance makes it a superlative addition to IBM's line of embedded PowerPC cores.--T.R.H. (The full version of this article appeared in the October 25 issue of Microprocessor Report.)

Massana's DSP Coprocessor Bolts Onto CPUs

While many embedded-processor vendors are adding DSP extensions, Massana's FILU-200 is quite different: it's a synthesizable DSP coprocessor that attaches to the CPU's memory bus and is programmable with C function libraries. Massana (http://www.massana.com) claims this approach delivers better price/performance than either a discrete DSP or a general-purpose CPU that's powerful enough to emulate a DSP.

If customers find Massana's licensing terms attractive, the FILU-200 is a good solution. When time-to-market is paramount, however, a more conventional solution, based on a general-purpose CPU -- with or without a discrete DSP -- would eliminate the need to port a synthesizable core to silicon for an ASIC. Massana's prewritten function libraries will save development time on the software side, but similar libraries for regular DSPs and some embedded CPUs are available from other vendors.--T.R.H. (The full version of this article appeared in the October 25 issue of Microprocessor Report.)

Industry Resources: Cahners MDR Dinner Meeting and Seminars

Cahners MicroDesign Resources, the publisher of Microprocessor Report and Embedded Processor Watch, is sponsoring two seminars and a dinner meeting at the Westin Hotel in Santa Clara on Thursday, November 4. The seminars are "Trends in Microprocessors for Embedded Applications" by Tom R. Halfhill, senior editor, Microprocessor Report, and "Processors for PCs: A Business and Strategy Perspective" by Michael Slater, principal analyst, Cahners MDR. The seminars are from 9 a.m. to 5:30 p.m.

The dinner presentation will be "Processor Options for Digital TV Applications" by Cees Hartgring, vice president and general manager of Philips' TriMedia business line, and Gert Slavenburg, fellow and chief architect of the TriMedia processor. Registration fees for one seminar and the dinner meeting: $845; for one seminar only: $795; for the dinner meeting only: $99. For more details or to register, go to http://www.MDRonline.com/dm or call 800.700.4004 or 707.824.4004.

 

Embedded IC Announcements

MCP320X (Microchip): a family of four 12-bit analog-to-digital converters (ADCs) available with one, two, four, or eight input channels (the MCP3201, MCP3202, MCP3204, and MCP3208, respectively). Throughput is 100,000 samples per second; supply voltages can range from 2.7 to 5.5 V. Price: $2.58/1,000 to $3.12/1,000 (depending on the number of input channels); production: now. Call Microchip at 480.786.7668 or go to http://www.microchip.com/.

AD9203 (Analog Devices): a 3.3-V, 10-bit ADC that consumes 74 mW at full speed (40 MSPS) and 0.65 mW in standby mode. It's packaged in a 28-pin TSSOP for battery-powered imaging systems, test equipment, radio receivers, and other low-power applications. Price: $4.90/1,000; production: now. Call ADI at 800.262.5643 or go to http://www.analog.com/.

AD9432 (Analog Devices): a 12-bit ADC with 105-MSPS performance, 5-V operation, 850 mW power consumption, and a track-and-hold circuit that delivers 80-dB spurious-free dynamic range up to the Nyquist frequency. Applications include cellular base stations, voice/data communications receivers, HDTV broadcast cameras, film scanners, and instrumentation. Price: $49.95/1,000; production: now. An 80-MSPS version is available for $35.79/1,000. Call ADI at 800.262.5643 or go to http://www.analog.com/.


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