Embedded Processor Watch

Editor: Tom Halfhill

In This Issue:

• Mips Plays Hardball With Soft Cores
• ADI Adopts AMBA for New DSPs
• Industry Resources: Cahners MDR Dinner Meeting and Seminars
• Embedded IC Announcements

Mips Plays Hardball With Soft Cores

Mips Technologies is getting softer all the time, but that's not good news for competitors. At the recent Microprocessor Forum, Mips announced the first implementation of its MIPS64 instruction-set architecture -- and the first 64-bit soft core from any microprocessor vendor. The new 5Kc, code-named Opal, is an R5000-class core that maintains backward compatibility with R4000/R5000 software.

MIPS64 doesn't add any new instructions beyond the 19 already introduced in MIPS32. But it does extend the architecture to 64 bits across the board -- including the system I/O bus, memory-address bus, general-purpose registers (GPRs), and internal datapaths. This should improve performance with embedded applications that manipulate data wider than 32 bits, such as ATM switches, Internet packet routers, and encryption software.

Surprisingly, the 64-bit 5Kc doesn't appear to be any faster than the 32-bit 4Kc. Both cores deliver 1.2 Dhrystone MIPS/MHz. But the Dhrystone 2.1 program is so small that it can't measure the 5Kc's 2x advantage in maximum cache size (64K vs. 32K). More important, Dhrystone doesn't measure the 5Kc's 2x advantage in data-handling capabilities (64 bits vs. 32 bits), its larger TLB (up to 96 entries vs. 32 entries), the greater efficiency of its optional write-back cache, or the versatility of its coprocessor interface, which the 4Kc lacks.--T.R.H. (The full version of this article appeared in the October 25 issue of Microprocessor Report.)

ADI Adopts AMBA for New DSPs

Analog Devices (ADI) unveiled a new DSP core at the recent Microprocessor Forum and announced that it will use Arm's Advanced High-Performance Bus (AHB) interface, which is part of the open-standard Advanced Microcontroller Bus Architecture (AMBA). The combination of AMBA and a synthesizable wrapper for the core allows ADI to design system-on-a-chip devices by integrating memory controllers, serial ports, telecommunications interfaces, and mixed-signal components.

The new core is the ADSP-219x, a 16-bit fixed-point DSP that's software-compatible with ADI's ADSP-218x family. It's not alone -- synthesizable DSP cores with comparable or higher performance are available from other vendors. Some examples are DSP Group's Palm (see Embedded Processor Watch #11, http://www.MDRonline.com/q/epw/issues/epw_11.html) and Teak (see Embedded Processor Watch #61, http://www.MDRonline.com/q/epw/issues/epw_61.html), and Infineon's Carmel. But the 219x isn't intended to be ADI's highest-performance DSP. That honor is reserved for the upcoming TigerSHARC architecture and for the fruit of ADI's collaboration with Intel.--T.R.H. (The full version of this article appeared in the October 25 issue of Microprocessor Report.)

Industry Resources: Cahners MDR Dinner Meeting and Seminars

Cahners MicroDesign Resources, the publisher of Microprocessor Report and Embedded Processor Watch, is sponsoring two seminars and a dinner meeting at the Westin Hotel in Santa Clara on Thursday, November 4. The seminars are "Trends in Microprocessors for Embedded Applications" by Tom R. Halfhill, senior editor, Microprocessor Report, and "Processors for PCs: A Business and Strategy Perspective" by Michael Slater, principal analyst, Cahners MDR. The seminars are from 9 a.m. to 5:30 p.m.

The dinner presentation will be "Processor Options for Digital TV Applications" by Cees Hartgring, vice president and general manager of Philips' TriMedia business line, and Gert Slavenburg, fellow and chief architect of the TriMedia processor. Registration fees for one seminar and the dinner meeting: $845; for one seminar only: $795; for the dinner meeting only: $99. For more details or to register, go to http://www.MDRonline.com/dm or call 800.700.4004 or 707.824.4004.

Embedded IC Announcements

MCP60x (Microchip): a family of four 2.7-V single-supply operational amplifiers that provide a gain bandwidth product of 3 MHz with a typical operating current of 250 microamps. They are available in single (MCP601), dual (MCP602), and quad (MCP604) amplifier options in PDIP, SOIC, and TSSOP packages. The MCP603 is a single amplifier with chip select. Price: $0.40 to $0.85/1,000; production: now. Call Microchip at 480.786.7668 or go to http://www.microchip.com/.

S3090 (AMCC): the industry's first silicon-germanium (SiGe) OC-192 transimpedance amplifier is designed for long-haul SONET/SDH-based dense wave-division multiplexing (DWDM) and time-division multiplexing (TDM). It has 1.4K differential transimpedance and consumes 470 mW. Price: $295/1,000; production: now. Call AMCC at 800.755.2622 or go to http://www.amcc.com/.

Fusion 878A (Conexant): a single-chip solution for audio/video capture in emerging digital-TV applications on PCs. It's pin- and software-compatible with Conexant's existing Bt878 and Bt879 PCI video decoders. The 878A supports a 20-MB/s serial port and a 40-MB/s GPIO port. Price: $15/10,000; samples: now; production: 4Q99. Call Conexant at 800.854.8099 or to go http://www.conexant.com/.