Embedded Processor Watch

Editor: Tom Halfhill

In This Issue:

• Mips vs. Lexra: Definitely Not Aligned
• ADI, StarCore Offer Vitamin C For DSPs
• Industry Resources: SOC It to Me
• Cahners MicroDesign Resources Seeks New Analyst

Mips vs. Lexra: Definitely Not Aligned

For the second time in two years, Mips has filed a lawsuit against Lexra (see Embedded Processor Watch #74, http://www.MDRonline.com/q/epw/issues/epw_74.html). The two patents at the center of the Mips complaint are U.S. 4,814,976 and U.S. 5,864,703. Mips applied for the '976 patent in 1986; it was granted in 1989. Mips applied for the '703 patent in 1997; it was granted last January. The '976 patent describes load and store instructions that handle data not aligned on word boundaries in memory. The '703 patent describes technology for reducing the loss of precision while performing arithmetic operations in single-instruction, multiple-data (SIMD) format.

Instead of supporting the Mips unaligned load/store instructions in hardware, Lexra provides licensees with a special trap handler and a C library to perform equivalent operations in software. The unsupported instructions trigger a reserved-instruction trap that executes a routine of alternate instructions. Nevertheless, Mips says this workaround infringes on the '976 patent.

Of course, microprocessors were loading and storing unaligned data long before Mips applied for the '976 patent in 1986. As Dominic Sweetman points out in *See MIPS Run*, a detailed textbook on the MIPS architecture, "Because CISC architectures such as the MC680x0 and Intel x86 do handle unaligned loads and stores, you may come across this as a problem when porting software." For Mips to prevail on this count, a court will have to interpret the patent broadly enough to include Lexra's method for loading and storing unaligned data but narrowly enough to exclude the methods used by other architectures that have existed since the 1970s.

The '703 patent describes SIMD instructions that store intermediate results in extended precision, then transform those results back to the original precision. If '703 applies only when a single instruction performs all those operations, Lexra may be off the hook, because its cores need multiple instructions. If '703 covers multiple instructions, Lexra could ask the court to invalidate the patent because of the existence of prior art. One early example we found is Motorola's 88110, introduced in 1991. It has SIMD instructions that manipulate 8-bit pixel values by unpacking them into 16-bit representations, later converting them back into 8-bit values.

Both Mips and Lexra have something to lose if this lawsuit goes to trial. That's why we expect them to reach a settlement that results in Lexra holding a MIPS license. Mips and Lexra need to focus on their real competition for licensable CPU cores: Arm.--T.R.H. (The full version of this article appeared in the December 6 issue of Microprocessor Report.)

ADI, StarCore Offer Vitamin C For DSPs

Last week, two DSP vendors released preliminary benchmarks of alpha- or beta-version C compilers for their preproduction DSPs. Analog Devices (ADI) claims a C compiler can achieve 70% of the performance of hand-coded assembly language on its first TigerSharc chip, the ADSP-TS001 (see Embedded Processor Watch #77, http://www.MDRonline.com/q/epw/issues/epw_77.html).

StarCore, a partnership between Lucent and Motorola, claims the compiler for its SC140 core (see Embedded Processor Watch #49, http://www.MDRonline.com/q/epw/issues/epw_49.html) can achieve nearly 45% of the performance of assembly language for one typical DSP algorithm, or close to 90% by mixing just a little assembly with lots of C.

With ADI, Motorola, Lucent, and Texas Instruments all planning to deliver new VLIW-based DSPs next year, the key differentiating factor may be the efficiency of their C compilers, not just the raw performance of the chips.--T.R.H. (The full version of this article appeared in the December 6 issue of Microprocessor Report.)

Industry Resources: SOC It to Me

By 2004, 70% of all ASICs will be a system on a chip (SOC), and 85% of all ASICs will contain some form of licensed intellectual property (IP). So says Integrated Circuit Engineering (ICE) in its new report, evocatively titled "ASIC -- System on a Chip." The report defines SOC and its implications for the traditional ASIC model; describes its use in specific markets, products, and applications; discusses technologies and core components; and explains the enablers of the SOC business model.

The report is available in hardcopy or on CD-ROM for $1,295. Additional copies are $775. For more information, contact ICE (Scottsdale, Ariz.) at 480.515.9780 or http://www.ice-corp.com.

Cahners MicroDesign Resources Seeks New Analyst

Cahners MicroDesign Resources, the publisher of this newsletter as well as Microprocessor Watch and Microprocessor Report, and the organizer of Microprocessor Forum and Embedded Processor Forum, is seeking another embedded-processor analyst to join its team.

Our analysts are highly visible thought leaders in the microprocessor industry and frequently meet with top architects and executives. Candidates must have at least five years of relevant design, marketing, or analysis experience as well as excellent communication skills. For more information, contact Steve Leibson (mailto:sleibson@mdr.cahners.com).