Processor Watch

December 13, 2004

Editor: Tom R. Halfhill  

In this issue:

x86 Power and Thermal Management
Jim McGregor -    {12/13/2004}

The performance of current x86 processors now exceeds the requirements of most applications for the typical PC consumer, but the performance and power curves continue to increase with the addition of new multimedia instructions, integration of additional features, and increasing transistor counts. As a result, the latest generation of x86 processors includes hardware and software features to better manage power and thermal requirements.

One of the key power-management and thermal protection enhancements to processors resulted from the introduction of the Advanced Controlled Power Interface (ACPI), which shifted many of the power- and thermal-management functions from a variety of BIOS-based solutions to more-enhanced OS-assisted solutions. All of the current generation of x86 processors support the ACPI specification to some level but still maintain other hardware-autonomous controls. Their level and implementation are dependent upon the driving factors in the application design.

Although the thermal characteristics of a processor are directly related to its power consumption, management of the two is handled differently. Managing the power can be done opportunistically to achieve desired performance states, such as a lower processor temperature or longer battery life. Thermal protection, likewise, manages the power, but as a requirement to avoid increasing the processor temperature and risking damage to the processor.

Even with the various power-management and thermal protection techniques, power consumption is ultimately determined by the processor load of the OS. As a result, it is easy to understand why the thermal design power (TDP) values are merely guidelines for maximum power- design requirements. This situation also makes comparing competing architectures very difficult. With the power limit shrinking for future computing platforms, due to mobility, usability, and cost of operation, future x86 processor designs will require power management and thermal protection to be key design considerations.

Microprocessor Report readers can access the full story (6 pages, 4 graphics) here: www.mdronline.com/mpr/h/2004/1213/185001.html. To find out more about Microprocessor Report, please visit: www.mdronline.com.

Viewpoint: The Mythology of Moore’s Law
Tom R. Halfhill - Senior Editor  {12/13/2004}

Moore’s law gets more attention all the time. Google finds 223,000 hits for the term on the Internet, remarkable for something as arcane as semiconductor chip manufacturing. People who can’t tell a silicon wafer from a compact disc don’t hesitate to name-drop Moore’s law at business lunches and parties, usually in the context of whether Intel stock is a good buy. Not since a falling apple led Sir Isaac Newton to discover universal gravitation have so many people been so captivated by a scientific law.

Yet Moore’s law isn’t really a law in the formal sense, and it isn’t scientific. Indeed, it barely works for its intended purpose: describing the progress of component integration on affordable silicon chips. But that doesn’t stop news reporters, commentators, analysts, and almost anybody with a calculator from applying Moore’s law to things as disparate as microprocessor clock frequency, microprocessor power consumption, general computer-system performance, disk storage capacity, network bandwidth, digital camera resolution, or—in the most egregious example I’ve seen—the business fortunes of Netscape, a software company. Two years ago, the widespread and growing misapplication of Moore’s law prompted me to define Moron’s law: “The number of ignorant references to Moore’s law doubles every 12 months.”

As we approach the 40th anniversary of Moore’s law in 2005, it’s time to set the record straight. The facts are these: Moore’s law is a narrow observation of a general manufacturing trend, not a law of physics; it wasn’t clearly defined in the first place; its definition has been significantly changed over the years, both by its author and by trespassers, to make it better fit the actual data; and past performance is no guarantee of future results.

Understand that I’m not attacking Moore’s law itself or its author, Intel cofounder Dr. Gordon E. Moore. My purpose is to counter the growing misconceptions about an interesting observation that, since 1965, has acquired a strange life of its own. Indeed, I believe there’s something romantic about Moore’s law that has propelled it into popular mythology.

Microprocessor Report readers can access the full story (4 pages, 2 graphics) here : www.mdronline.com/mpr/h/2004/1213/185002.html. To find out more about Microprocessor Report, please visit: www.mdronline.com.

Notes From AMD’s Analyst Meeting
Jim McGregor -    {12/13/2004}

During 3Q04, AMD’s success with the AMD64 technology continued as AMD posted a 30% increase in sales, driven by a 33.6% increase over 3Q03 in sales of computational products, which also aided in raising gross margins from 38% in 2Q04 to 41% in 3Q04. The result was a net profit of $44 million on $1.239 billion in sales. Leading the way was the continued success of the Athlon 64 processors for desktops and the Opteron processors for servers. AMD is focused on the high-end computing market with the AMD64-based products in an effort to further increase average selling prices (ASPs) and margins, especially as the software environment catches up. AMD anticipates a 10% growth in processors in 2005 and a significant information technology upgrade cycle to 64-bit technology in 2005 and 2006, in sync with software releases from Sun, Microsoft, and Linux. AMD also added Broadcom as a new server chipset partner.

In PCs, AMD is focusing its efforts on enterprise customers through Tier One OEMs and on emerging markets. For the mobile platform, AMD will also begin offering lower-power solutions, beginning in 1Q05. AMD’s strategic focus for the foreseeable future, however, will be on dual/multicore processors that contain up to eight processor cores for data-mining and compute-intensive applications. The first dual-core Opteron processor will debut in mid-2005 with 200 million transistors, but it will fit into the same die area, power envelope, and thermal envelope as its single-core counterpart, using the same 90nm process. One key feature will be the use of split power planes to allow large portions of the chip to be disabled. Additional enhancements to the architecture in 2006 will include Pacifica (virtualization) and Presidio (security). Future processors will also support DDR2, DDR3, and FBDIMM with multiple memory controllers, and HT 3 and PCI Express 2 I/O interfaces.

On other fronts, Spansion LLC, AMD’s Flash partnership with Fujitsu, has generated its third consecutive quarterly profit, but sales dropped 20% in the third quarter owing to overcapacity in the market and increasing competition from NAND technology. For manufacturing technology and capacity, AMD has extended its process-development agreement with IBM to 45nm and beyond and has licensed the technology to Chartered Semiconductor for additional capacity. AMD also kicked off its 50x15 initiative in 3Q04 by introducing the Personal Internet Communicator (PIC), aimed at lower-income families in developing regions.

In-Stat/MDR believes AMD is making significant strides in the competitiveness of its products, market positioning, and manufacturing technology, but the company still faces challenges in the Flash memory market and the 50x15 initiative.

Microprocessor Report readers can access the full story (3 pages, 2 graphics) here: www.mdronline.com/mpr/h/2004/1213/185003.html. To find out more about Microprocessor Report, please visit: www.mdronline.com.

Intel/Nvidia Cross-License Surprise
Kevin Krewell - Senior Editor  {12/13/2004}

Every once in a while, we get a real surprise. Friday, November 19, was one of those days. That was the day Nvidia and Intel announced they had signed a patent cross-license agreement and Nvidia had acquired a license for the front-side bus of Intel processors. This agreement allows Nvidia to now expand its chip-set business beyond AMD and enter the chip-set business for Intel processors. Nvidia has been selling chip sets for AMD processors under the nForce brand name since 2001.

Nvidia had tried for years to license Intel’s bus in order to make chip sets for the Pentium 4. After all, Nvidia had to interface to Intel’s Pentium III/Celeron bus for the Xbox design, and it planned to take the platform technology it created for the Xbox into the mainstream PC market. To grow the market for Nvidia chip sets, the company had to enter the Intel market.

Despite the hoopla of the event (mostly from Nvidia), neither Nvidia nor Intel was talking about details of the transaction. No details were given on the financial aspects of the agreement nor on any restrictions imposed by either party. And while we conjecture about product plans, Nvidia has not announced any plans. I was assured, however, that there are no plans for Nvidia to build an x86 processor.

This agreement does give Nvidia access to a larger market for its chip sets and for its SLI platform, so it is a positive move for Nvidia. In the short term, Intel gains access to Nvidia’s SLI platform for high-end, high-visibility, and high-margin gaming systems.

Microprocessor Report readers can access the full story (2 pages) here: www.mdronline.com/mpr/h/2004/1213/185004.html. To find out more about Microprocessor Report, please visit: www.mdronline.com.

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