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November 3, 2008

In this issue:


Godson-3 Emulates x86


Tom R. Halfhill - Senior Editor  {11/03/2008}

The hottest presentation at the recent Hot Chips Symposium at Stanford University was the world’s first look at the Godson-3, the latest generation of China’s most powerful microprocessor family. It was the first time a Chinese CPU architect visited the U.S. to lift the bamboo curtain on a home-grown Chinese processor at a major technical conference. Journalists from industry publications as well as from mainstream media eagerly joined the usual Hot Chips audience of engineers for a peek at the new design.

There was much to admire. The Godson-3, also known as the Loongson-3, is the first multicore member of this seven-year-old Chinese microprocessor family. The initial Godson-3, taping out this year, integrates four MIPS-compatible 64-bit processor cores in a crossbar network. This quad-core block is scalable, so future implementations may have dozens of cores. (Smaller implementations are planned, too.) The first chips will be fabricated in 65nm CMOS, and clock speeds are expected to hit 1.0GHz.

Equally interesting is an optional on-chip coprocessor for signal processing and high-performance floating-point math. The initial quad-core Godson-3 won’t have this coprocessor, but a second implementation, scheduled for tapeout in 2009, will have four of them, along with four of the MIPS-compatible cores. By leveraging this extra horsepower, the Chinese hope to build a supercomputer within two years that executes one petaflops (one quadrillion floating-point operations per second). That performance would match the fastest supercomputer in the world today.

As if those revelations aren’t enough, the Godson-3 has another startling feature: more than 200 new instructions and other modifications that accelerate x86-to-MIPS dynamic binary translation. In other words, the Godson-3 applies hardware optimization to x86 emulation, much as Transmeta did with its Crusoe and Efficeon microprocessors.

That feature raised a few eyebrows. Godson processors are designed at the Institute for Computing Technology (ICT), part of the Chinese Academy of Sciences in Beijing. ICT does not have a license for either the MIPS or x86 architectures. Last year, ICT resolved an intellectual-property dispute with MIPS Technologies by partnering with STMicroelectronics, a MIPS licensee. But do the x86-like extensions risk another conflict—this time with Intel, and perhaps with Transmeta as well?

At Microprocessor Report, we aren’t patent attorneys, but our initial analysis is that the Godson-3’s extensions probably don’t tread on intellectual property owned by Intel (the inventor of the x86 architecture) or Transmeta (whose hardware-assisted “code morphing software” advanced the art of x86 emulation). The Godson-3 doesn’t appear to go as far toward x86 compatibility as Transmeta’s processors did, and Transmeta had no legal problems with Intel for almost seven years. Intel and Transmeta didn’t clash until 2006, when Transmeta filed a patent-infringement lawsuit against Intel, prompting Intel to respond with a countersuit. Both suits were quickly settled out of court, largely in Transmeta’s favor. (See MPR 12/26/07, “Transmeta’s Second Life.”)

MPR considers the Godson-3 a significant improvement over the Godson-2 series. It moves Chinese microprocessor technology closer to the state of the art, as practiced by the likes of AMD, IBM, Intel, and Sun Microsystems. The Godson-3 will advance China’s quest for greater technology independence—a vital part of the nation’s long-term economic strategy. (See MPR 6/26/06, “China’s Microprocessor Dilemma,” and MPR 7/25/05, “China’s Emerging Microprocessors.”)

Graphics with this article:
Figure 1. Block diagram of the GS464 processor core.
Figure 2. Cluster of four GS464 processor cores sharing four coherent L2 caches.
Figure 3. Two GS464 clusters linked together, forming an eight-core microprocessor.
Figure 4. A massively parallel implementation of the Godson-3 could populate the on-chip mesh network with 16 or more quad-core clusters.
Figure 5. GStera coprocessor block diagram.
Figure 6. Quad-core Godson-3 layout.
Figure 7. Two examples of x86 virtual machines running atop a MIPS version of Linux on the Godson-3.
Photo: The Godson-3 was presented at the Hot Chips Symposium by Zhiwei Xu, a professor at the Institute of Computing Technology, Chinese Academy of Sciences.

Microprocessor Report readers can access the full story (10 pages) here:
www.mdronline.com/mpr/h/2008/1103/224401.html.

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